Fast mixed-mode simulation for accurate MOS bridging fault detection
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[1] Prathima Agrawal,et al. Automatic modeling of switch-level networks using partial orders , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.
[2] Resve A. Saleh,et al. Mixed-mode incremental simulation and concurrent fault simulation , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.
[3] Tracy Larrabee,et al. Testing for parametric faults in static CMOS circuits , 1990, Proceedings. International Test Conference 1990.
[4] Prathima Agrawal,et al. Automatic modeling of switch-level networks using partial orders [MOS circuits] , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[5] Resve Saleh,et al. Simulation and analysis of transient faults in digital circuits , 1992 .
[6] Ibrahim N. Hajj,et al. A switch-level matrix approach to transistor-level fault simulation , 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.
[7] Ibrahim N. Hajj. An algebra for switch-level simulation , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.
[8] Gerald E. Sobelman,et al. Fast switch-level fault simulation using functional fault modeling , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.