An Extensible Parallel Processor Simulator Design and Evaluation

Adopting the parallel processor to process image in parallel is an effective way to improve the processing rate.In this paper,an extensible parallel processor for image processing(EPIP) and specific instruction sets are proposed,based on the analysis of recent international and national progress of parallel processors.Many stream processor units(SP) are reused in the developed processor,which are organized in the single instruction multiple data(SIMD) way to fully exploit the data-level parallel.The very long instruction word(VLIW) and simultaneous multithreading(SMT) technologies are implemented in a single SP,which realizes the instruction-level parallel(ILP) and task-level parallel(TLP) respectively.Specific instruction sets support the hybrid addressing of private registers and shared registers.The SystemVerilog is employed to build up the cycle-based simulation model of the proposed architecture,and several common image processing algorithms are mapped to the simulator.Finally,the preliminary performance of EPIP is given.