Realization of an airborne radar parallel signal processing system

In order to fulfil real time signal processing tasks such as clutter rejection, moving target detection (MTD) and constant false alarm rate (CFAR) control in airborne radar, an airborne radar parallel signal processing system (ARPS2) is proposed with DSP chips as its kernel processing nodes. The DSP chips are used with parallel architecture. Each node has its private input and output memory. It adopts several parallel techniques, such as parallel storage, parallel processing, parallel code loading and parallel data organization to achieve high efficiency. It has a simple structure, excellent flexibility and easiness in developing. ARPS2 is going to be applied to an airborne radar. It can also be applied to perform high-speed real time signal processing algorithms in other kinds of radar.