Analysis and Optimization of a Low-Noise LDO

To reduce the noise of an LDO chip,the noise of an LDO was analyzed.Based on the noise characteristics,three methods of suppressing noise were proposed,i.e.to modify the circuit's topology,to add a low-pass filter at the output of band-gap reference and to design a low-noise band-gap reference.Considering the chip area and power consumption,the third method was employed to optimize the LDO's output noise.A low-noise band-gap reference was designed to suppress the noise substantially.The LDO was implemented in TSMC 0.35 μm process.The simulated performance shows that the integrated output noise range from 10 Hz to 100 kHz dropped from 808 μV to 280 μV.