TAINT: Tool for Automated INsertion of Trojans

Testing designs implemented in a Field Programmable Gate Array (FPGA) against hardware-based attacks requires one to inject numerous classes of vulnerabilities (e.g., hardware Trojans) into the FPGA based designs. We developed a Tool for Automated INsertion of Trojans (TAINT) providing numerous benefits. First, TAINT can evaluate FPGA based designs against known and unknown attacks. Second, TAINT can insert Trojans at different stages in the FPGA based design cycle such as the Register-Transfer Logic and the post-synthesis translate, map, and route. Moreover, TAINT offers fine-grained controls to a user to precisely insert Trojans in particular FPGA resources. Most importantly, TAINT can automate Trojan Testing. Our experiments will use TAINT to explore the attack spaces at the pre-and post-synthesis stages of a FPGA design.

[1]  Ramesh Karri,et al.  FPGA Trust Zone: Incorporating trust and reliability into FPGA designs , 2016, 2016 IEEE 34th International Conference on Computer Design (ICCD).

[2]  Farinaz Koushanfar,et al.  A Survey of Hardware Trojan Taxonomy and Detection , 2010, IEEE Design & Test of Computers.

[3]  Matt Bishop,et al.  About Penetration Testing , 2007, IEEE Security & Privacy.

[4]  Mark Mohammad Tehranipoor,et al.  Trustworthy Hardware: Identifying and Classifying Hardware Trojans , 2010, Computer.

[5]  Jeyavijayan Rajendran,et al.  Logic encryption: A fault analysis perspective , 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[6]  Matthew French,et al.  Intra-die process variation aware anomaly detection in FPGAs , 2014, 2014 International Test Conference.

[7]  Jeyavijayan Rajendran,et al.  Design and analysis of ring oscillator based Design-for-Trust technique , 2011, 29th VLSI Test Symposium.

[8]  Jeyavijayan Rajendran,et al.  Blue team red team approach to hardware trust assessment , 2011, 2011 IEEE 29th International Conference on Computer Design (ICCD).

[9]  Jeyavijayan Rajendran,et al.  Towards a comprehensive and systematic classification of hardware Trojans , 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

[10]  Rajat Subhra Chakraborty,et al.  Hardware Trojan Insertion by Direct Modification of FPGA Configuration Bitstream , 2013, IEEE Design & Test.