Compiler and runtime techniques for software transactional memory optimization

Software transactional memory (STM) systems are an attractive environment to evaluate optimistic concurrency. We describe our experience of supporting and optimizing an STM system at both the managed runtime and compiler levels. We describe the design policies of our STM system and the statistics collected by the runtime to identify performance bottlenecks and guide tuning decisions. We present an initial work on supporting automatic instrumentation of the STM primitives for C-C++ and Java programs in the IBM XL compiler and J9 Java virtual machine. We evaluate and discuss the performance of several transactional programs running on our system. Copyright © 2008 John Wiley & Sons, Ltd.

[1]  Kunle Olukotun,et al.  The common case transactional behavior of multithreaded programs , 2006, The Twelfth International Symposium on High-Performance Computer Architecture, 2006..

[2]  Virendra J. Marathe,et al.  Adaptive Software Transactional Memory , 2005, DISC.

[3]  Satish Narayanasamy,et al.  Unbounded page-based transactional memory , 2006, ASPLOS XII.

[4]  Kunle Olukotun,et al.  Transactional memory coherence and consistency , 2004, Proceedings. 31st Annual International Symposium on Computer Architecture, 2004..

[5]  Bradley C. Kuszmaul,et al.  Unbounded transactional memory , 2005, 11th International Symposium on High-Performance Computer Architecture.

[6]  Mark Moir,et al.  Hybrid transactional memory , 2006, ASPLOS XII.

[7]  Milo M. K. Martin,et al.  Making the fast case common and the uncommon case simple in unbounded transactional memory , 2007, ISCA '07.

[8]  Maurice Herlihy,et al.  Transactional Memory: Architectural Support For Lock-free Data Structures , 1993, Proceedings of the 20th Annual International Symposium on Computer Architecture.

[9]  Maurice Herlihy,et al.  Software transactional memory for dynamic-sized data structures , 2003, PODC '03.

[10]  Maurice Herlihy,et al.  A flexible framework for implementing software transactional memory , 2006, OOPSLA '06.

[11]  Bratin Saha,et al.  McRT-STM: a high performance software transactional memory system for a multi-core runtime , 2006, PPoPP '06.

[12]  Suresh Jagannathan,et al.  Transparently Reconciling Transactions with Locking for Java Synchronization , 2006, ECOOP.

[13]  Quinn Jacobson,et al.  Architectural Support for Software Transactional Memory , 2006, 2006 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06).

[14]  Dan Grossman,et al.  Enforcing isolation and ordering in STM , 2007, PLDI '07.

[15]  Nir Shavit,et al.  Software transactional memory , 1995, PODC '95.

[16]  David A. Wood,et al.  LogTM: log-based transactional memory , 2006, The Twelfth International Symposium on High-Performance Computer Architecture, 2006..

[17]  Torvald Riegel,et al.  A Lazy Snapshot Algorithm with Eager Validation , 2006, DISC.

[18]  Maurice Herlihy,et al.  Virtualizing Transactional Memory , 2005, ISCA 2005.

[19]  David A. Bader,et al.  Design and Implementation of the HPCS Graph Analysis Benchmark on Symmetric Multiprocessors , 2005, HiPC.

[20]  Michael F. Spear,et al.  Conflict Detection and Validation Strategies for Software Transactional Memory , 2006, DISC.

[21]  Marc Tremblay.  Transactional memory for a modern microprocessor , 2007, PODC '07.

[22]  Craig B. Zilles,et al.  Hardware atomicity for reliable software speculation , 2007, ISCA '07.

[23]  Mark Plesko,et al.  Optimizing memory transactions , 2006, PLDI '06.

[24]  S. B. Yao,et al.  Efficient locking for concurrent operations on B-trees , 1981, TODS.

[25]  David A. Wood,et al.  LogTM-SE: Decoupling Hardware Transactional Memory from Caches , 2007, 2007 IEEE 13th International Symposium on High Performance Computer Architecture.

[26]  Nir Shavit,et al.  Transactional Locking II , 2006, DISC.

[27]  David Eisenstat,et al.  Lowering the Overhead of Software Transactional Memory , 2006 .

[28]  Luis Ceze,et al.  Implicit parallelism with ordered transactions , 2007, PPoPP.

[29]  Brian T. Lewis,et al.  Compiler and runtime support for efficient software transactional memory , 2006, PLDI '06.

[30]  Bratin Saha,et al.  Code Generation and Optimization for Transactional Memory Constructs in an Unmanaged Language , 2007, International Symposium on Code Generation and Optimization (CGO'07).

[31]  Josep Torrellas,et al.  Bulk Disambiguation of Speculative Threads in Multiprocessors , 2006, 33rd International Symposium on Computer Architecture (ISCA'06).