Leakage inductance calculation for high power density converters applications

This work presents a complete procedure to compute the leakage inductance of high power density printed circuit board used in power electronic converters. By the magnetic field study, the proposed method gives an intuitive way to design a power PCB board by managing adequately the current densities. The proposed procedure is based on the three dimensional finite element method and the Biot-Savart integral law. By combining these two concepts, it is possible to determine a zero field path used to define the integration surface for the flux computation and consequently the leakage inductance. The method efficiency is demonstrated on a 24 V - 417 A buck converter printed circuit board used in low voltage high current applications. A detailed method used to estimates the leakage inductance during the hard switching process is also presented. Numerical as well as experimental results are shown and compared to prove the viability of the proposed approach.