Three-Layer Cooperative Architecture for MPEG-2 Video Encoder LSI

This paper presents an architecture for a singlechip MPEG-2 video encoder and demonstrates its flexibility and usefulness. The architecture based on three-layer cooperation provides flexible data-transfer that improves the encoder from the standpoints of versatility, scalability, and video quality. The LSI was successfully fabricated in the 0.25-μm four-metal CMOS process. Its small size and its low power consumption make it ideal for a wide range of applications, such as DVD recorders, PC-card encoders and HDTV encoders. key words: MPEG-2, video signal processing, embedded system

[1]  I. Tamitani,et al.  A 1.5-W single-chip MPEG-2 MP@ML video encoder with low power motion estimation and clocking , 1997, IEEE J. Solid State Circuits.

[2]  Mitsuo Ikeda,et al.  A hardware/software concurrent design for a real-time SP@ML MPEG2 video-encoder chip set , 1996, Proceedings ED&TC European Design and Test Conference.

[3]  Takeshi Ogura,et al.  High-speed software-based platform for embedded software of a single-chip MPEG-2 video encoder LSI with HDTV scalability , 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).

[4]  Toshio Kondo,et al.  Scalable architecture of real-time MP@HL MPEG-2 video encoder for multiresolution video , 1998, Electronic Imaging.

[5]  Yasuyuki Okumura,et al.  An MPEG2-based digital CATV and VOD system using ATM-PON architecture , 1996, Proceedings of the Third IEEE International Conference on Multimedia Computing and Systems.

[6]  H. Kodama,et al.  A 100 mm/sup 2/ 0.95 W single-chip MPEG2 MP@ML video encoder with a 128GOPS motion estimator and a multi-tasking RISC-type controller , 1998, 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156).

[7]  T. Ishikawa,et al.  A 1.2 W single-chip MPEG2 MP@ML video encoder LSI including wide search range motion estimation and 81 MOPS controller , 1998, 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156).

[8]  T. Ikenaga,et al.  Two-chip MPEG-2 video encoder , 1996, IEEE Micro.

[9]  Toshio Kondo,et al.  Motion-estimation/motion-compensation hardware architecture for a scene-adaptive algorithm on a single-chip MPEG-2 MP@ML video encoder , 1998, Electronic Imaging.

[10]  Yoshiyuki Yashima,et al.  MPEG2 video and audio codec board set for a personal computer , 1995, Proceedings of GLOBECOM '95.