High-frequency interconnect modeling for global signal networks
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[1] E. Friedman,et al. Equivalent Elmore delay for RLC trees , 1999, Proceedings 1999 Design Automation Conference (Cat. No. 99CH36361).
[2] W. R. Eisenstadt,et al. High-speed VLSI interconnect modeling based on S-parameter measurements , 1993 .
[3] J.A. Reynoso-Hernandez,et al. Influence of the SRO as passivation layer on the microwave attenuation losses of the CPWs fabricated on HR-Si , 2003, IEEE Microwave and Wireless Components Letters.
[4] M. Linares-Aranda,et al. Fused timing analytical model for repeater insertion and optimization , 2005, 48th Midwest Symposium on Circuits and Systems, 2005..
[5] Yao-Wen Chang,et al. Timing modeling and optimization under the transmission line model , 2004, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[6] H.M. Hegazy. RLC parasitic extraction and circuit model optimization for Cu/SiO/sub 2/-90nm inductance structures , 2005, 2005 European Microwave Conference.
[7] D.F. Williams,et al. Characteristic impedance determination using propagation constant measurement , 1991, IEEE Microwave and Guided Wave Letters.
[8] W. R. Eisenstadt,et al. S-parameter-based IC interconnect transmission line characterization , 1992 .
[9] H.M. Hegazy. RLC parasitic extraction and circuit model optimization for Cu/SiO/sub 2/-90 nm inductance structures , 2005, European Gallium Arsenide and Other Semiconductor Application Symposium, GAAS 2005.