Bit line sensing method of semiconduct memory device

The bit line sensing method for a semiconductor memory device is disclosed. Bit line sensing method according to an embodiment of the present invention, the bit line sense amplifier is the first and a second inverter an input terminal connected to a first inverter and a second bit line has an input terminal connected to the first bit line, and and a precharging a second bit line to the bit line pre-charge voltage; Adjusting the first voltage and the second bit line on the basis of the first inverter and the second inverter a threshold voltage of the pull-down portion and the pull-up section included in each; Further comprising: one of said first and second bit line, charge sharing between the memory cells corresponding thereto; And a step for amplifying the voltage difference between the second bit line and the first bit line.