Design of the DSP Platform based on TETRA Speech Codec Arithmetic

In this paper, according to the result of analyzing the optimization of the TETRA speech codec arithmetic, we discussed the design of DSP platform based on TMS320VC5402. We first introduce the TETRA arithmetic, and then discuss the detail of the circuit design procedure, circuit diagram scheme, and PCB scheme, the corresponding software design, including the design of initialization program, bootload program, CPLD program for timing circuit. Finally, we provide the detailed discuss of problems encountered in testing and their solutions. Test and operation results indicate that our designed platform works well and can be widely applied in TETRA algorithm implementation.