Reliability aware simulation flow: From TCAD calibration to circuit level analysis

In this paper, we present a simulation flow based on TCAD model calibration against experimental transistor measurement and doping profile reverse engineering. Further the physical astatistical variability simulations at TCAD level are also adjusted to match the statistical measurement. This is folloed up by oxide wear out reliability characterization and modelling. Finally statistical compact model libraries for fresh and aged devices are extracted from large samples of TCAD simulation results allowing the performance analysis of a 6T SRAM cell. The calibration procedure has been performed on P and NMOS transistors fabricated and characterized by IMEC, while Glasgow University performed the TCAD reverse engineering and calibration, and the statistical simulations using dedicated Gold Standard Simulations tools.

[1]  N. Horiguchi,et al.  Impact of single charged gate oxide defects on the performance and scaling of nanoscaled FETs , 2012, 2012 IEEE International Reliability Physics Symposium (IRPS).

[2]  Jie Ding,et al.  Statistical simulations of 6T-SRAM cell ageing using a reliability aware simulation flow , 2015, 2015 45th European Solid State Device Research Conference (ESSDERC).

[3]  G. Groeseneken,et al.  From mean values to distributions of BTI lifetime of deeply scaled FETs through atomistic understanding of the degradation , 2011, 2011 Symposium on VLSI Technology - Digest of Technical Papers.

[4]  T. Grasser,et al.  The time dependent defect spectroscopy (TDDS) for the characterization of the bias temperature instability , 2010, 2010 IEEE International Reliability Physics Symposium.

[5]  A. Asenov,et al.  Statistical Enhancement of the Evaluation of Combined RDD- and LER-Induced $V_{T}$ Variability: Lessons From $\hbox{10}^{5}$ Sample Simulations , 2011, IEEE Transactions on Electron Devices.

[6]  Andrew R. Brown,et al.  Simulation of 3D FinFET doping profiles by ion implantation , 2012 .

[7]  T. Grasser,et al.  Time-dependent defect spectroscopy for characterization of border traps in metal-oxide-semiconductor transistors , 2010 .

[8]  Andrew R. Brown,et al.  Analytical Models for Three-Dimensional Ion Implantation Profiles in FinFETs , 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[9]  Andrew R. Brown,et al.  RTS amplitudes in decananometer MOSFETs: 3-D simulation study , 2003 .

[10]  T. Grasser,et al.  Defect-based methodology for workload-dependent circuit lifetime projections - Application to SRAM , 2013, 2013 IEEE International Reliability Physics Symposium (IRPS).

[11]  A. Asenov,et al.  Origin of the Asymmetry in the Magnitude of the Statistical Variability of n- and p-Channel Poly-Si Gate Bulk MOSFETs , 2008, IEEE Electron Device Letters.

[12]  A. Asenov,et al.  The relevance of deeply-scaled FET threshold voltage shifts for operation lifetimes , 2012, 2012 IEEE International Reliability Physics Symposium (IRPS).

[13]  Alper Demir,et al.  SAMURAI: An accurate method for modelling and simulating non-stationary Random Telegraph Noise in SRAMs , 2011, 2011 Design, Automation & Test in Europe.

[14]  G. Groeseneken,et al.  Circuit-design oriented modelling of the recovery BTI component and post-BD gate currents , 2009, 2009 Spanish Conference on Electron Devices.

[15]  J. Martin-Martinez,et al.  Time-dependent variability of high-k based MOS devices: Nanoscale characterization and inclusion in circuit simulators , 2011, 2011 International Electron Devices Meeting.

[16]  Trudo Clarysse,et al.  Status and review of two-dimensional carrier and dopant profiling using scanning probe microscopy , 2000 .

[17]  E. Cartier,et al.  Reliability Challenges for CMOS Technology Qualifications With Hafnium Oxide/Titanium Nitride Gate Stacks , 2009, IEEE Transactions on Device and Materials Reliability.

[18]  T. Grasser,et al.  Impact of Individual Charged Gate-Oxide Defects on the Entire $I_{D}$–$V_{G}$ Characteristic of Nanoscaled FETs , 2012, IEEE Electron Device Letters.

[19]  W. Marsden.  I and J , 2012 .

[20]  Jie Ding,et al.  Modelling RTN and BTI in nanoscale MOSFETs from device to circuit: A review , 2014, Microelectronics and reliability.

[21]  B. Cheng,et al.  Interplay between statistical reliability and variability: A comprehensive transistor-to-circuit simulation technology , 2013, 2013 IEEE International Reliability Physics Symposium (IRPS).