Diagnosing CMOS bridging faults with stuck-at, IDDQ, and voting model fault dictionaries

Fault dictionaries for the stuck-at fault model are not appropriate for diagnosing CMOS bridging faults. This paper shows that for CMOS circuits containing bridging faults, either IDDQ or the voting model is needed for correct diagnosis. However, a technique based upon the voting model that uses stuck-at fault dictionaries to diagnose bridging faults is described. When the traditional stuck-at fault technique is used, between 30-50% of the bridging faults resulted in a misleading diagnosis which indicated the presence of the failure on a fault-free node. In addition, as the stuck-at fault diagnostic ability of a test increased, the bridging fault diagnostic ability decreased.<<ETX>>

[1]  Edward J. McCluskey,et al.  Test and Diagnosis Procedure for Digital Networks , 1971, Computer.

[2]  Yves Crouzet,et al.  Physical Versus Logical Fault Models MOS LSI Circuits: Impact on Their Testability , 1980, IEEE Transactions on Computers.

[3]  Miron Abramovici.  A Maximal Resolution Guided-Probe Testing Algorithm , 1981, 18th Design Automation Conference.

[4]  John Paul Shen,et al.  Inductive Fault Analysis of MOS Integrated Circuits , 1985, IEEE Design & Test of Computers.

[5]  Stephen Y. H. Su,et al.  A systematic technique for detecting and locating bridging and stuck-at faults in I/O pins of LSI/VLSI chips , 1987 .

[6]  Wojciech Maly,et al.  Realistic Fault Modeling for VLSI Testing , 1987, 24th ACM/IEEE Design Automation Conference.

[7]  Francis M. Boland,et al.  Automatic location of IC design errors using an E-beam system , 1988, International Test Conference 1988 Proceeding@m_New Frontiers in Testing.

[8]  Walter Charles Hamscher.  Model-based troubleshooting of digital systems , 1988 .

[9]  Péter Fazekas,et al.  Electron beam tester integrated into a VLSI tester , 1988, International Test Conference 1988 Proceeding@m_New Frontiers in Testing.

[10]  J.A. Waicukauski,et al.  Failure diagnosis of structured VLSI , 1989, IEEE Design & Test of Computers.

[11]  S.D. Millman,et al.  Diagnosing CMOS bridging faults with stuck-at fault dictionaries , 1990, Proceedings. International Test Conference 1990.

[12]  Thomas M. Storey,et al.  STUCK FAULT AND CURRENT TESTING COMPARISON USING CMOS CHIP TEST , 1991, 1991, Proceedings. International Test Conference.

[13]  Melvin A. Breuer,et al.  MAXIMAL DIAGNOSIS FOR WIRING NETWORKS , 1991, 1991, Proceedings. International Test Conference.

[14]  Robert C. Aitken,et al.  Fault Location with Current Monitoring , 1991, 1991, Proceedings. International Test Conference.

[15]  Rosa Rodríguez-Montañés,et al.  Bridging defects resistance measurements in a CMOS process , 1992, Proceedings International Test Conference 1992.

[16]  John M. Acken,et al.  Special applications of the voting model for bridging faults , 1993 .