Automatic Verification of Real-Time Systems with Rich Data: An Overview
暂无分享,去创建一个
[1] Jochen Hoenicke,et al. Kleene, Rabin, and Scott Are Available , 2010, CONCUR.
[2] Bernd Finkbeiner,et al. Slicing abstractions , 2007, FSEN'07.
[3] Wil Janssen,et al. Layered design of parallel systems , 1994 .
[4] Renate A. Schmidt. Automated Deduction - CADE-22, 22nd International Conference on Automated Deduction, Montreal, Canada, August 2-7, 2009. Proceedings , 2009, CADE.
[5] Jochen Hoenicke,et al. Model checking Duration Calculus: a practical approach , 2006, Formal Aspects of Computing.
[6] Wang Yi,et al. Timed Automata Patterns , 2008, IEEE Transactions on Software Engineering.
[7] Andreas Podelski,et al. ARMC: The Logical Choice for Software Model Checking with Abstraction Refinement , 2007, PADL.
[8] Rajeev Alur,et al. A Temporal Logic of Nested Calls and Returns , 2004, TACAS.
[9] Carsten Ihlemann,et al. System Description: H-PILoT , 2009, CADE.
[10] Larry Wos,et al. What Is Automated Reasoning? , 1987, J. Autom. Reason..
[11] Bernd Finkbeiner,et al. SLAB: A Certifying Model Checker for Infinite-State Concurrent Systems , 2010, TACAS.
[12] Ernst-Rüdiger Olderog,et al. Layered Composition for Timed Automata , 2010, FORMATS.
[13] Jochen Hoenicke,et al. CSP-OZ-DC: A Combination of Specification Techniques for Processes, Data and Time , 2002, Nord. J. Comput..
[14] Jochen Hoenicke,et al. Combination of processes, data, and time , 2006 .
[15] Bernd Finkbeiner,et al. Subsequence Invariants , 2008, CONCUR.
[16] Andrea Maggiolo-Schettini,et al. Reachability results for timed automata with unbounded data structures , 2010, Acta Informatica.
[17] Roland Meyer,et al. Model Checking Data-Dependent Real-Time Properties of the European Train Control System , 2006, 2006 Formal Methods in Computer Aided Design.
[18] Christel Baier,et al. Models and temporal logical specifications for timed component connectors , 2007, Software & Systems Modeling.
[19] Ernst-Rüdiger Olderog,et al. Syspect - Modelling, Specifying, and Verifying Real-Time Systems with Rich Data , 2011, Int. J. Softw. Informatics.
[20] Paul Gastin,et al. CONCUR 2010 - Concurrency Theory, 21th International Conference, CONCUR 2010, Paris, France, August 31-September 3, 2010. Proceedings , 2010, CONCUR.
[21] Johannes Faber,et al. Verification Architectures: Compositional Reasoning for Real-Time Systems , 2010, IFM.
[22] Panos J. Antsaklis,et al. Hybrid Systems II , 1994, Lecture Notes in Computer Science.
[23] Ernst-Rüdiger Olderog,et al. Structural transformations for data-enriched real-time systems , 2014, Formal Aspects of Computing.
[24] Holger Giese,et al. Towards the compositional verification of real-time UML designs , 2003, ESEC/FSE-11.
[25] Carsten Ihlemann,et al. On Hierarchical Reasoning in Combinations of Theories , 2010, IJCAR.
[26] Jirí Srba,et al. Comparing the Expressiveness of Timed Automata and Timed Extensions of Petri Nets , 2008, FORMATS.
[27] Kevin Lano,et al. Design Patterns Formalization Techniques , 2007 .
[28] Frédéric Lang,et al. Parallel Processes with Real-Time and Data: The ATLANTIF Intermediate Format , 2009, IFM.
[29] Jochen Hoenicke,et al. Nested interpolants , 2010, POPL '10.
[30] Ernst-Rüdiger Olderog,et al. Automatic Verification of Combined Specifications: An Overview , 2008, TTSS.
[31] Zhe Dang,et al. Pushdown timed automata: a binary reachability characterization and safety verification , 2001, Theor. Comput. Sci..
[32] Marsha Chechik,et al. CONCUR 2008 - Concurrency Theory, 19th International Conference, CONCUR 2008, Toronto, Canada, August 19-22, 2008. Proceedings , 2008, CONCUR.
[33] George C. Necula,et al. Data Structure Specifications via Local Equality Axioms , 2005, CAV.
[34] Anders P. Ravn,et al. Design Verification Patterns , 2007, Formal Methods and Hybrid Real-Time Systems.
[35] Ingo Brückner. Slicing integrated formal specifications for verification , 2008 .
[36] Jochen Hoenicke,et al. Model-Checking of Specifications Integrating Processes, Data and Time , 2005, FM.
[37] Ernst-Rüdiger Olderog,et al. Integrating a formal method into a software engineering process with UML and Java , 2008, Formal Aspects of Computing.
[38] Carsten Ihlemann,et al. On Local Reasoning in Verification , 2008, TACAS.
[39] Ahmed Bouajjani,et al. On the Automatic Verification of Systems with Continuous Variables and Unbounded Discrete Data Structures , 1994, Hybrid Systems.
[40] Kim G. Larsen,et al. Formal modeling and analysis of an audio/video protocol: an industrial case study using UPPAAL , 1997, Proceedings Real-Time Systems Symposium.
[41] Krishnendu Chatterjee,et al. Quantitative languages , 2008, TOCL.
[42] Johannes Faber,et al. Automatic Verification of Parametric Specifications with Complex Topologies , 2010, IFM.
[43] Peter Csaba Ölveczky,et al. Formal modeling, performance estimation, and model checking of wireless sensor network algorithms in Real-Time Maude , 2009, Theor. Comput. Sci..
[44] Jochen Hoenicke,et al. Refinement of Trace Abstraction , 2009, SAS.
[45] Martin Fränzle,et al. Deciding an Interval Logic with Accumulated Durations , 2007, TACAS.
[46] Toufik Taibi. Design Pattern Formalization Techniques , 2007 .
[47] Ingo Brückner,et al. Slicing Concurrent Real-Time System Specifications for Verification , 2007, IFM.
[48] Henny B. Sipma,et al. What's Decidable About Arrays? , 2006, VMCAI.
[49] Kousha Etessami,et al. Analysis of Recursive Game Graphs Using Data Flow Equations , 2004, VMCAI.