A new L/sub eff/ extraction approach for devices with pocket implants
暂无分享,去创建一个
[1] A. Huang. Analysis of the inductive turn-off of double gate MOS controlled thyristors , 1996 .
[2] C. C. McAndrew,et al. MOSFET effective channel length, threshold voltage, and series resistance determination by robust optimization , 1992 .
[3] Y. Yeow,et al. Measurement of V/sub T/ and L/sub eff/ using MOSFET gate-substrate capacitance , 1999, ICMTS 1999. Proceedings of 1999 International Conference on Microelectronic Test Structures (Cat. No.99CH36307).
[4] Dai-Hoon Lee,et al. A capacitance method to determine the metallurgical gate-to-source/drain overlap length of submicron LDD MOSFETs , 1995, Proceedings International Conference on Microelectronic Test Structures.
[5] Y. Yeow,et al. Measurement of VT and Leff using MOSFET gate-substrate capacitance , 1999 .
[6] B. Riccò,et al. A novel method to characterize parasitic capacitances in MOSFET's , 1995, IEEE Electron Device Letters.
[7] Dimitri A. Antoniadis,et al. An accurate gate length extraction method for sub-quarter micron MOSFET's , 1996 .
[8] Steve S. Chung,et al. A new approach to determine the effective channel length and the drain-and-source series resistance of miniaturized MOSFET's , 1994 .
[9] Yuan Taur,et al. MOSFET channel length: extraction and interpretation , 2000 .
[10] N. Collaert,et al. Limitations of shift-and-ratio based L/sub eff/ extraction techniques for MOS transistors with halo or pocket implants , 2000, IEEE Electron Device Letters.
[11] Y. Taur,et al. A new 'shift and ratio' method for MOSFET channel-length extraction , 1992, IEEE Electron Device Letters.