Low-power autozeroed high-speed comparator for the readout chain of a CMOS monolithic active pixel sensor based vertex detector

Future high energy physics experiments will require the development of a linear collider in the TeV region such as TESLA. Because of physics requirements it will be necessary to make precision vertex measurements. This makes a high-resolution vertex detector an essential part of the detecting system. One of the possibilities is to develop a CMOS monolithic active pixel sensors (MAPS) based detector. A planned prototype chip for the TESLA developments would include an array of identical pixels with their addressing circuits, signal processing within the chip, data sparsification, and analogue to digital conversion. For this purpose we have developed a column-based, low power, fully offset compensated multistage comparator (discriminator) to read out the active pixels. For one of the versions implemented, a resolution better than 1 mV was obtained at operating speeds higher than 10 MHz. The power dissipation is of the order of 200 /spl mu/W. A test chip was designed on a 0.35 /spl mu/m CMOS process from AMI Semiconductor. As the pixel pitch is only 28 /spl mu/m, the dimensions of the comparator are 300 /spl mu/m/spl times/28 /spl mu/m. This design is compatible with the clocking scheme of the pixel array.

[1]  Behzad Razavi,et al.  Principles of Data Conversion System Design , 1994 .

[2]  S. Manly,et al.  Design and performance of the SLD vertex detector: a 307 Mpixel tracking system , 1997 .

[3]  Eric R. Fossum,et al.  CMOS image sensors: electronic camera-on-a-chip , 1997 .

[4]  Behzad Razavi,et al.  Design techniques for high-speed, high-resolution comparators , 1992 .

[5]  G. Deptuch,et al.  Monolithic active pixel sensors with on-pixel amplification and double sampling operation , 2003 .

[6]  A. Hastings.  The Art of Analog Layout , 2000 .

[7]  Yukihiro Fujimoto,et al.  A current-controlled latch sense amplifier and a static power-saving input buffer for low-power architecture , 1993 .

[8]  Claude Colledani,et al.  A monolithic active pixel sensor for charged particle tracking and imaging using standard VLSI CMOS technology , 2001 .

[9]  Jean A. Farre,et al.  Non-stationary noise responses of some fully differential on-chip readout circuits suitable for CMOS image sensors , 1999 .

[10]  Gabor C. Temes,et al.  Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization , 1996, Proc. IEEE.

[11]  D.J. Allstot.  A precision variable-supply CMOS comparator , 1982, IEEE Journal of Solid-State Circuits.

[12]  Kari Halonen,et al.  CMOS dynamic comparators for pipeline A/D converters , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

[13]  Roubik Gregorian,et al.  Introduction to CMOS OP-AMPs and Comparators , 1999 .

[14]  E. Eid,et al.  Design and characterization of ionizing radiation-tolerant CMOS APS image sensors up to 30 Mrd (Si) total dose , 2001 .

[15]  Yavuz Degerli.  Étude, modélisation des bruits et conception des circuits de lecture dans les capteurs d'images à pixels actifs CMOS , 2000 .

[16]  Franco Maloberti,et al.  Analog Design for CMOS VLSI Systems , 2001 .

[17]  Eric R. Fossum,et al.  Active pixel sensors: are CCDs dinosaurs? , 1993, Electronic Imaging.

[18]  Pierre Magnan,et al.  Analysis and reduction of signal readout circuitry temporal noise in CMOS image sensors for low-light levels , 2000 .

[19]  Guido Torelli,et al.  High-speed autozeroed CMOS comparator for multistep A/D conversion , 1998 .

[20]  A. Boni,et al.  High-speed, low-power BiCMOS comparator using a pMOS variable load , 1998 .