Cold delay defect screening

Delay defects can escape detection during the normal production test flow; particularly if they do not affect any of the long paths included in the test flow. Some delay defects can have their delay increased, making them easier to detect, by carrying out the test with a very low supply voltage (VLV testing). However, VLV testing is not effective for delay defects caused by high resistance interconnects. This paper presents a screening technique for such defects. This technique, cold testing, relies on carrying out the test at low temperature. One particular type of defect, silicide open, is analyzed and experimental data are presented to demonstrate the effectiveness of cold testing.

[1]  Daniel W. Dobberpuhl,et al.  The design and analysis of VLSI circuits , 1985 .

[2]  I. W Stanley,et al.  The application of marginal voltage measurements to detect and locate defects in digital microcircuits , 1982 .

[3]  Wayne M. Needham,et al.  High volume microprocessor test escapes, an analysis of defects our tests are missing , 1998, Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270).

[4]  Edward J. McCluskey,et al.  Detecting delay flaws by very-low-voltage testing , 1996, Proceedings International Test Conference 1996. Test and Design Validity.

[5]  A. Borghesi,et al.  Electrical and optical properties of silicide single crystals and thin films , 1993 .

[6]  Gordon L. Smith,et al.  Model for Delay Faults Based upon Paths , 1985, ITC.

[7]  Sudhakar M. Reddy,et al.  On Delay Fault Testing in Logic Circuits , 1987, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[8]  Eugene R. Hnatek.  Integrated circuit quality and reliability , 1987 .

[9]  Kwang-Ting Cheng,et al.  Delay testing considering power supply noise effects , 1999, International Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034).

[10]  Melvin A. Breuer,et al.  Switch-level delay test , 1999, International Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034).

[11]  H. B. Bakoglu,et al.  Circuits, interconnections, and packaging for VLSI , 1990 .

[12]  T. Kamins.  Polycrystalline silicon for integrated circuit applications , 1988 .

[13]  John J. Shedletsky,et al.  An Experimental Delay Test Generator for LSI Logic , 1980, IEEE Transactions on Computers.

[14]  Edward J. McCluskey,et al.  DELAY TESTING OF DIGITAL CIRCUITS BY OUTPUT WAVEFORM ANALYSIS , 1991, 1991, Proceedings. International Test Conference.