A novel design of infrared focal plane array with digital read out interface

Infrared focal plane array (IRFPA) with digital read out interface is a key sign of the third generation IRFPA, which plays an important role in the reliability and miniaturization of infrared systems. A readout integrated circuit (ROIC) of IRFPA with digital readout interface based on dual ramp single slope (DRSS) analog to digital converter (ADC) architecture is presented in the paper. The design is realized using shared ADCs in column-wise and these ADCs are consisted of simplified DRSS architecture and shared units. Sample, conversion and readout are proceeded simultaneously in order to adapt large scale and high readout frame rate application. This circuit also shows many advantages, including small area and low power consumption. Simulation result shows that this architecture can be expand to 320×256 pixel array with a frame rate of 100 frames per second or a larger size whit lower frame rate, the quantized resolution of this circuit is 12 bit, and the analog power consumption is only 17μw per ADC.

[1]  Patrick Maillart,et al.  Sigma-delta column-wise A/D conversion for cooled ROIC , 2007, SPIE Defense + Commercial Sensing.

[2]  John W. Yang,et al.  Radiation-hardened 10-bit A/D for FPA signal processing , 1992, Defense, Security, and Sensing.

[3]  Shimon Elkind,et al.  Focal plane processor with a digital video output for InSb detectors , 2003, SPIE Optics + Photonics.

[4]  Abbas El Gamal,et al.  Techniques for pixel-level analog-to-digital conversion , 1998, Defense, Security, and Sensing.

[5]  Markus Loose,et al.  Low power system-on-chip FPAs , 2003, SPIE Optics + Photonics.

[6]  Rudy Van De Plassche Integrated analog-to-digital and digital-to-analog converters / Rudy Van De Plassche , 1994 .

[7]  Shimon Elkind,et al.  Digital cooled InSb detector for IR detection , 2003, SPIE Defense + Commercial Sensing.

[8]  Deepnarayan Gupta,et al.  High-resolution superconductive serial analog-to-digital converter for on-focal plane data conversion , 1998, Defense, Security, and Sensing.

[9]  G. G. Stokes "J." , 1890, The New Yale Book of Quotations.

[10]  Albert J. P. Theuwissen,et al.  A 1.8 V 3.2 /spl mu/W comparator for use in a CMOS imager column-level single-slope ADC , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[11]  Philippe Tribolet,et al.  Digital output for high-performance MCT staring arrays , 2006, SPIE Defense + Commercial Sensing.

[12]  He Li A New On-chip Analog-to-digital Conversion Circuit for IRFPA , 2006 .