Restricted Fetch and Φ operations for parallel processing

This paper discusses a restricted form of the general Fetch&&PHgr; operation and how the restricted form can be combined. In this restricted form, all processors participating in the combining have identical Fetch&&PHgr; operations. Most applications of Fetch&&PHgr; proposed in the literature satisfy the restrictions imposed. We show how this restricted form of Fetch&&PHgr; allows an easy implementation of combining, especially in bus-based multiprocessors and multiprocessors with a separate synchronization memory. Applications of the proposed restricted Fetch&&PHgr; operation are also considered.