Multiple beam mask writers: an industry solution to the write time crisis

The semiconductor industry is under constant pressure to reduce production costs even as technology complexity increases. Lithography represents the most expensive process due to its high capital equipment costs and the implementation of low-k1 lithographic processes, which has added to the complexity of making masks through the greater use of optical proximity correction, pixelated masks, and double or triple patterning. Each of these mask technologies allows the production of semiconductors at future nodes while extending the utility of current immersion tools. Low k1 patterning complexity combined with increased data due to smaller feature sizes is driving extremely long mask write times. While a majority of the industry is willing to accept mask write times of up to 24 hours, evidence suggests that the write times for many masks at the 22 nm node and beyond will be significantly longer. It has been estimated that $50M+ in non-recurring engineering (NRE) costs will be required to develop a multiple beam mask writer system, yet the business case to recover this kind of investment is not strong. Moreover, funding such a development is a high risk for an individual supplier. The problem is compounded by a disconnect between the tool customer (the mask supplier) and the final mask customer that will bear the increased costs if a high speed writer is not available. Since no individual company will likely risk entering this market, some type of industry-wide funding model will be needed. Because SEMATECH's member companies strongly support a multiple beam technology for mask writers to reduce the write time and cost of 193 nm and EUV masks, SEMATECH plans to pursue an advanced mask writer program in 2011 and 2012. In 2010, efforts will focus on identifying a funding model to address the investment to develop such a technology.