ReconOS: An Operating System Approach for Reconfigurable Computing

The ReconOS operating system for reconfigurable computing offers a unified multithreaded programming model and OS services for threads executing in software and threads mapped to reconfigurable hardware. The OS interface lets hardware threads interact with software threads using well-known mechanisms such as semaphores, mutexes, condition variables, and message queues. By semantically integrating hardware accelerators into a standard OS environment, ReconOS allows for rapid design-space exploration, supports a structured application development process, and improves the portability of applications between different reconfigurable computing systems.

[1]  Roger Woods.  Programmable Logic and Applications , 2001 .

[2]  Marco Platzner,et al.  A self-adaptive heterogeneous multi-core architecture for embedded real-time video object tracking , 2011, Journal of Real-Time Image Processing.

[3]  Ying Wang,et al.  A partially reconfigurable architecture supporting hardware threads , 2012, 2012 International Conference on Field-Programmable Technology.

[4]  Marco Platzner,et al.  Reconfigurable nodes for future networks , 2010, 2010 IEEE Globecom Workshops.

[5]  Philip Garcia,et al.  A Reconfigurable Hardware Interface for a Modern Computing System , 2007 .

[6]  Tampere Hall.  2005 International Conference on Field Programmable Logic and Applications (FPL) , 2005 .

[7]  Lesley Shannon,et al.  FUSE: Front-End User Framework for O/S Abstraction of Hardware Accelerators , 2011, 2011 IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines.

[8]  Marco Platzner,et al.  Cooperative multithreading in dynamically reconfigurable systems , 2009, 2009 International Conference on Field Programmable Logic and Applications.

[9]  Peter J. Ashenden,et al.  Programming models for hybrid FPGA-cpu computational components: a missing link , 2004, IEEE Micro.

[10]  Scott Hauck,et al.  Configuration relocation and defragmentation for reconfigurable computing , 2000, Proceedings 2000 IEEE Symposium on Field-Programmable Custom Computing Machines (Cat. No.PR00871).

[11]  Majid Sarrafzadeh,et al.  Fast Template Placement for Reconfigurable Computing Systems , 2000, IEEE Des. Test Comput..

[12]  John A. Williams,et al.  A Process Model for Hardware Modules in Reconfigurable System-on-Chip , 2006, ARCS.

[13]  Rudy Lauwereins,et al.  Designing an operating system for a heterogeneous reconfigurable SoC , 2003, Proceedings International Parallel and Distributed Processing Symposium.

[14]  Gordon J. Brebner,et al.  A Virtual Hardware Operating System for the Xilinx XC6200 , 1996, FPL.

[15]  Paolo Ienne,et al.  Seamless hardware-software integration in reconfigurable computing systems , 2005, IEEE Design & Test of Computers.

[16]  Jim Stevens,et al.  Achieving Programming Model Abstractions for Reconfigurable Computing , 2008, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[17]  D. Bhatia,et al.  Reconfigurable computing , 1997, Proceedings Tenth International Conference on VLSI Design.

[18]  Marco Platzner,et al.  Operating systems for reconfigurable embedded platforms: online scheduling of real-time tasks , 2004, IEEE Transactions on Computers.

[19]  Marco Platzner,et al.  Memory Virtualization for Multithreaded Reconfigurable Hardware , 2011, 2011 21st International Conference on Field Programmable Logic and Applications.