Trends in Design Methods for Complex Heterogeneous Systems

The design of heterogeneous Systems-on-Chips (SoC) in very deep submicron technologies has become a very complex task that has to bridge very high level system descriptions with low-level considerations due to technology defaults and variations, and increasing system and circuit complexity. This paper describes the major low-level issues, such as dynamic and static power consumption, temperature, technology variations, interconnect, Design for Manufacturing (DFM), reliability and yield, and their impact on high-level design, such as the design of multi-V dd , fault-tolerant, redundant or adaptive chip architectures. Some multi-processor based SoC (MPSoC) cases are also presented in three domains in which heterogeneity is large: wireless sensor networks, vision sensors and mobile TV. These examples also highlight the heterogeneous nature and the increasing complexity at circuit-level, with the extension from CMOS-only SoCs towards MEMS-and-CMOS SoCs.

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