Enhanced dual strategy based VLSI architecture for computing pseudo inverse of channel matrix in a MIMO wireless system

Multiple input multiple output (MIMO) wireless technology involves highly complex signal processing which is directly related to increased power and area consumption in VLSI architecture. This paper proposes an enhanced dual strategy based VLSI architecture developed for computing the pseudo inverse of augmented channel matrix used in MIMO systems. The architecture concurrently addresses algorithmic optimization of number of multipliers while at the same time allowing for intelligent selective clock gating to disable the clock to those portions of the architecture that remain inactive during period of computation. Results indicate overall 36% power and 31% area reduction compared to previous architecture without degrading the BER performance.

[1]  Gene H. Golub,et al.  Matrix computations , 1983 .

[2]  Miodrag Potkonjak,et al.  Optimizing power using transformations , 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[3]  C. M. Rader,et al.  VLSI systolic arrays for adaptive nulling [radar] , 1996, IEEE Signal Process. Mag..

[4]  Massoud Pedram,et al.  Power minimization in IC design: principles and applications , 1996, TODE.

[5]  Gerard J. Foschini,et al.  Layered space-time architecture for wireless communication in a fading environment when using multi-element antennas , 1996, Bell Labs Technical Journal.

[6]  C. Rader,et al.  VLSI systolic arrays for adaptive nulling , 1996 .

[7]  Reinaldo A. Valenzuela,et al.  V-BLAST: an architecture for realizing very high data rates over the rich-scattering wireless channel , 1998, 1998 URSI International Symposium on Signals, Systems, and Electronics. Conference Proceedings (Cat. No.98EX167).

[8]  Massoud Pedram,et al.  Multi-code state assignment for low power design , 2000 .

[9]  Babak Hassibi,et al.  An efficient square-root algorithm for BLAST , 2000, 2000 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.00CH37100).

[10]  Markus Rupp,et al.  Prototype experience for MIMO BLAST over third-generation wireless system , 2003, IEEE J. Sel. Areas Commun..

[11]  Zhan Guo,et al.  A VLSI implementation of MIMO detection for future wireless communications , 2003, 14th IEEE Proceedings on Personal, Indoor and Mobile Radio Communications, 2003. PIMRC 2003..

[12]  George Lawton.  Is MIMO the future of wireless communications? , 2004, Computer.

[13]  B. Hochwald,et al.  Silicon complexity for maximum likelihood MIMO detection using spherical decoding , 2004, IEEE Journal of Solid-State Circuits.

[14]  John S. Thompson,et al.  Area & power efficient VLSI architecture for computing pseudo inverse of channel matrix in a MIMO wireless system , 2006, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06).