Current Mode Circuits for Programmable WTA Neural Network

In this article prototype AB class programmable synaptic connection and WTAcircuits that set foundations for low power VLSI neural networks and other applications areproposed. The analysis of the circuits is given. A qualitative comparison of currentconsumption is made between standard A class and proposed AB class circuits. Layouts ofthe AB class transconductance programmable synaptic connection and 2-WTA circuits havebeen designed and then the prototype CMOS circuits have been manufactured and measured.Measured characteristics have been compared to simulated ones.

[1]  K. Wawryn.  AB class current mode multipliers for programmable neural networks , 1996 .

[2]  V. A. Pedroni.  Inhibitory mechanism analysis of complexity O(N) MOS winner-take-all networks , 1995 .

[3]  John Taylor,et al.  A scalable high-speed current-mode winner-take-all network for VLSI neural applications , 1995 .

[4]  Takahiro Inoue,et al.  Fuzzy Multiple-Input Maximum and Minimum Circuits in Current Mode and Their Analyses Using Bounded-Difference Equations , 1990, IEEE Trans. Computers.

[5]  Gordon W. Roberts,et al.  Current Conveyor Theory And Practice , 1993 .

[6]  Edgar Sanchez-Sinencio,et al.  Min-net winner-take-all CMOS implementation , 1993 .

[7]  S. Graffi,et al.  CMOS implementation of an analogically programmable cellular neural network , 1993 .

[8]  Lin-Bao Yang,et al.  Cellular neural networks: theory , 1988 .

[9]  Krzysztof Wawryn,et al.  Programmable low power VLSI current mode neuron cells , 1996, Proceedings of Third International Conference on Electronics, Circuits, and Systems.

[10]  A. Demosthenous,et al.  Enhanced modular CMOS current-mode winner-take-all network , 1996, Proceedings of Third International Conference on Electronics, Circuits, and Systems.

[11]  Krzysztof Wawryn,et al.  Low power VLSI neuron cells for artificial neural networks , 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

[12]  Teuvo Kohonen,et al.  An introduction to neural computing , 1988, Neural Networks.

[13]  C. Schneider,et al.  Analog CMOS synaptic learning circuits adapted from invertebrate biology , 1991 .

[14]  Bing J. Sheu,et al.  Analog floating-gate synapses for general-purpose VLSI neural computation , 1991 .

[15]  Jacek M. Zurada,et al.  Introduction to artificial neural systems , 1992 .

[16]  Á. Rodríguez-Vázquez,et al.  Current-mode techniques for the implementation of continuous- and discrete-time cellular neural networks , 1993 .