Sub-THz interconnect for planar chip-to-chip communications
暂无分享,去创建一个
Qun Jane Gu | Bo Yu | Xuan Ding | Zhiwei Xu | Xiaoguang Liu | Yu Ye | Christian Neher
[1] Qun Jane Gu,et al. High-Efficiency Micromachined Sub-THz Channels for Low-Cost Interconnect for Planar Integrated Circuits , 2016, IEEE Transactions on Microwave Theory and Techniques.
[2] Q. Gu,et al. A 165-GHz Transmitter With 10.6% Peak DC-to-RF Efficiency and 0.68-pJ/b Energy Efficiency in 65-nm Bulk CMOS , 2016, IEEE Transactions on Microwave Theory and Techniques.
[4] Kosuke Katayama,et al. 98 mW 10 Gbps Wireless Transceiver Chipset With D-Band CMOS Circuits , 2013, IEEE Journal of Solid-State Circuits.
[5] Qun Jane Gu,et al. High energy-efficiency high bandwidth-density sub-THz interconnect for the “Last-Centimeter” chip-to-chip communications , 2017, 2017 IEEE MTT-S International Microwave Symposium (IMS).
[6] Tanaka Shinsuke,et al. A 25Gb/s Hybrid Integrated Silicon Photonic Transceiver in 28nm CMOS and SOI , 2015 .
[7] Kenichi Okada,et al. 13.3 A 56Gb/s W-band CMOS wireless transceiver , 2016, 2016 IEEE International Solid-State Circuits Conference (ISSCC).
[8] Keiichi Higeta,et al. 3.3 A 25Gb/s multistandard serial link transceiver for 50dB-loss copper cable in 28nm CMOS , 2016, 2016 IEEE International Solid-State Circuits Conference (ISSCC).
[9] Samuel Jameson,et al. A packaged 106–110 GHz bi-directional 10Gbps 0.11 pJ/bit/cm CMOS transceiver , 2015, 2015 IEEE MTT-S International Microwave Symposium.
[10] Yoichi Koyanagi,et al. 22.2 A 25Gb/s hybrid integrated silicon photonic transceiver in 28nm CMOS and SOI , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.
[11] Qun Jane Gu,et al. Low-loss and Broadband G-Band Dielectric Interconnect for Chip-to-Chip Communication , 2016, IEEE Microwave and Wireless Components Letters.