A 6-b 600 MS/s SAR ADC with a new switching procedure of 2-b/stage and self-locking comparators*
暂无分享,去创建一个
Jun Xu | Ning Li | Fan Ye | Junyan Ren | Jixuan Xiang | Chixiao Chen | Fan Ye | Ning Li | Junyan Ren | Chixiao Chen | Jun Xu | Jixuan Xiang
[1] R.W. Brodersen,et al. A 6-bit 600-MS/s 5.3-mW Asynchronous ADC in 0.13-$\mu{\hbox{m}}$ CMOS , 2006, IEEE Journal of Solid-State Circuits.
[2] Qi Wei,et al. A single channel, 6-bit 230-MS/s asynchronous SAR ADC based on 2 bits/stage , 2014 .
[3] Rui Paulo Martins,et al. A 4.8-bit ENOB 5-bit 500MS/s binary-search ADC with minimized number of comparators , 2011, IEEE Asian Solid-State Circuits Conference 2011.
[4] Shouli Yan,et al. A 32 mW 1.25 GS/s 6b 2b/Step SAR ADC in 0.13 µm CMOS , 2009, IEEE J. Solid State Circuits.
[5] Patrick Chiang,et al. A Single-Channel, 1.25-GS/s, 6-bit, 6.08-mW Asynchronous Successive-Approximation ADC With Improved Feedback Delay in 40-nm CMOS , 2012, IEEE Journal of Solid-State Circuits.
[6] Robert W. Brodersen,et al. A 6-bit 600-MS/s 5.3-mW asynchronous ADC in 0.13-μm CMOS , 2006 .
[7] Robert W. Brodersen,et al. A 1-GS/s 6-bit 6.7-mW ADC in 65-nm CMOS , 2009, 2009 IEEE Custom Integrated Circuits Conference.
[8] Ho-Jin Park,et al. A 7b 1GS/s 7.2mW nonbinary 2b/cycle SAR ADC with register-to-DAC direct control , 2012, Proceedings of the IEEE 2012 Custom Integrated Circuits Conference.
[9] Franco Maloberti,et al. An 8-b 400-MS/s 2-b-Per-Cycle SAR ADC With Resistive DAC , 2012, IEEE Journal of Solid-State Circuits.
[10] Dean Liu,et al. A 10.3GS/s 6b flash ADC for 10G Ethernet applications , 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.
[11] Soon-Jyh Chang,et al. A 9-Bit 150-MS/s Subrange ADC Based on SAR Architecture in 90-nm CMOS , 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.
[12] Soon-Jyh Chang,et al. A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching Procedure , 2010, IEEE Journal of Solid-State Circuits.
[13] B.P. Ginsburg,et al. 500-MS/s 5-bit ADC in 65-nm CMOS With Split Capacitor Array DAC , 2007, IEEE Journal of Solid-State Circuits.
[14] Yuan-Ching Lien,et al. A 4.5-mW 8-b 750-MS/s 2-b/step asynchronous subranged SAR ADC in 28-nm CMOS technology , 2012, 2012 Symposium on VLSI Circuits (VLSIC).
[15] Rui Paulo Martins,et al. A power-efficient 1.056 GS/s resolution-switchable 5-bit/6-bit flash ADC for UWB applications , 2006, 2006 IEEE International Symposium on Circuits and Systems.
[16] Geert Van der Plas,et al. A 150 MS/s 133$~\mu$W 7 bit ADC in 90 nm Digital CMOS , 2008, IEEE Journal of Solid-State Circuits.