A diagnostic test pattern generation algorithm
暂无分享,去创建一个
[1] Prabhakar Goel,et al. An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic Circuits , 1981, IEEE Transactions on Computers.
[2] Gary D. Hornbuckle,et al. Diagnosis of Single-Gate Failures in Combinational circuits , 1969, IEEE Transactions on Computers.
[3] J. Paul Roth,et al. Programmed Algorithms to Compute Tests to Detect and Distinguish Between Failures in Logic Circuits , 1967, IEEE Trans. Electron. Comput..
[4] Paolo Prinetto,et al. Diagnosis oriented test pattern generation , 1990, Proceedings of the European Design Automation Conference, 1990., EDAC..
[5] Paolo Prinetto,et al. Assessing the diagnostic power of test pattern sets , 1990 .
[6] Gernot Metze,et al. A New Representation for Faults in Combinational Digital Circuits , 1972, IEEE Transactions on Computers.
[7] 藤原 秀雄,et al. Logic testing and design for testability , 1985 .
[8] Melvin A. Breuer,et al. Diagnosis and Reliable Design of Digital Systems , 1977 .
[9] Stephen Y. H. Su,et al. A New Approach to the Fault Location of Combinational Circuits , 1972, IEEE Transactions on Computers.
[10] R. G. Bennetts. Introduction to Digital Board Testing , 1982 .
[11] EDWARD J. McCLUSKEY,et al. Fault Equivalence in Combinational Logic Networks , 1971, IEEE Transactions on Computers.
[12] F. Brglez,et al. A neutral netlist of 10 combinational benchmark circuits and a target translator in FORTRAN , 1985 .
[13] M. Sonza Reorda,et al. A new algorithm for diagnosis-oriented automatic test pattern generation , 1990, [Proceedings] EURO ASIC `90.