Switch device and method for measuring transmission delay through FPGA

The invention provides a switch device and method for measuring transmission delay through an FPGA. The switch device is characterized in that as for an SV sample data raw package meeting the IEEE802.3 standard, the FPGA inside a switch records the moment Tr when the first bit of a message enters a port of the switch and the moment Tt when the first bit of the message is transmitted out from the port of the switch, the timestamp accuracy is in the nanosecond grade, the FPGA calculates the residence time deltaT of the message in the switch according to the formula deltaT=Tt-Tr, and the residence time deltaT is written into a designated position in the SV message. According to the switch device and method, the problem that timing of a relay protection device in an intelligent substation in the networking mode must depend on an external clock is solved, the fundamental principle that SV sample data are synchronized by a use device is reflected, and the theory is equivalent to that of the mode that the SV sample data are directly transmitted without the switch.