Efficient preamble design for digital DMSK packet synchronization

Studies the preamble design for a fully digital feedforward receiver for minimum shift keying modulation and asynchronous burst mode transmission. Timing error and frequency offset are estimated simultaneously and corrected subsequently. Frame synchronization is based on tentative bit demodulation and bit correlation. An optimal preamble has to be optimized with respect to best timing error and frequency offset estimation and to the best performance of the frame synchronization algorithm. Optimal preambles with different lengths of the synchronization word and filter lengths of the estimation filter are given. The performance difference between optimally and sub-optimally designed preambles is assessed by computer simulations.<<ETX>>