Systematic Structure to Implement the Retiming Algorithm as a GUI Software

In this paper, a systematic structure to implement the retiming algorithm as a software is proposed. Using this structure, a software which performs the retiming algorithm automatically from a graphical input is presented. Through this software the input digital system is modeled in the computer, then it is converted to a predefined matrix format, finally the software performs the retiming algorithm to minimize the Critical Path (CP). Next, the software delivers the retimed system as a graphical schematic. The software is designed as a Graphical User Interface (GUI) and it is tested for many sample digital systems. Simulation results show the proposed software provides a simple fast system optimization. In fact, users are able to quickly draw their digital systems in the software then perform the retiming algorithm. Generally, this paper describes how to systematically create a GUI based software from an advanced algorithm for a user so that the user does not need to learn about the base theory or mathematical formats for interpreting both the inputs and the results; he/she just employs the software using simple graphical actions such as mouse/keyboard clicking.

[1]  Boris Murmann.  Digitally Assisted Analog Circuits , 2006, IEEE Micro.

[2]  Ata Khorami,et al.  A Low-Power High-Speed Comparator for Precise Applications , 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[3]  Ata Khorami,et al.  A low-power dynamic comparator for low-offset applications , 2019, Integr..

[4]  Keshab K. Parhi,et al.  VLSI digital signal processing systems , 1999 .

[5]  Richard J. Higgins,et al.  Digital signal processing in VLSI , 1990 .

[6]  Piero Malcovati,et al.  F1: Digitally assisted analog and analog-assisted digital in high-performance scaled CMOS process , 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).

[7]  Ata Khorami,et al.  Excess power elimination in high-resolution dynamic comparators , 2017, Microelectron. J..

[8]  M. Bialko,et al.  Evolutionary design of combinational digital circuits: State of the art, main problems, and future trends , 2008, 2008 1st International Conference on Information Technology.

[9]  Ata Khorami,et al.  A low-power technique for high-resolution dynamic comparators , 2018, Int. J. Circuit Theory Appl..

[10]  Xin-She Yang,et al.  Introduction to Algorithms , 2021, Nature-Inspired Optimization Algorithms.

[11]  Alice C. Parker,et al.  The high-level synthesis of digital systems , 1990, Proc. IEEE.

[12]  David F. Martin.  Programming Languages: Boolean matrix methods for the detection of simple precedence grammars , 1968, CACM.

[13]  Nicole Fassbinder,et al.  Combinatorial Optimization Networks And Matroids , 2016 .

[14]  Ata Khorami,et al.  General Characterization Method and a Fast Load-Charge-Preserving Switching Procedure for the Stepwise Adiabatic Circuits , 2016, IEEE Transactions on Circuits and Systems I: Regular Papers.