A Low-Overhead Dynamic TCAM With Pipelined Read-Restore Refresh Scheme

Hardware search using content addressable memory (CAM) produces the fastest upshot but takes larger design area and consumes relatively high power. Dynamic CAM certainly is an alternative to resolve these issues, but the slower search speed and void of ternary approach act as primary design constraints. A fully ternary dynamic storage is presented for high density and low leakage associative memory. A unique self-refresh scheme is introduced with pipelined read-restore mechanism that updates the CAM cells at much lower refresh overhead. The proposed 4-kb dynamic ternary CAM structure has been designed using predictive 45-nm CMOS technology at a 48% reduced cell area than traditional ternary CAM and simulated using SPECTRE at a supply voltage of 1.0 V. The proposed design dissipates 0.583-fJ/bit/search at a search rate of 440 MHz. The refresh module has been integrated at an additional area of 1.92% and updates the TCAM at 0.21% refresh overhead.

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