Practical PACE for embedded systems

In current embedded systems, one of the major concerns is energy conservation. The dynamic voltage-scheduling (DVS) framework, which involves dynamically adjusting the voltage and frequency of the CPU, has become a well studied technique. It has been shown that if a task's computational requirement is only known probabilistically, there is no constant optimal speed for the task and the expected energy consumption is minimized by gradually increasing speed as the task progresses citelorchsmith. It is possible to find the optimal speed schedule if we assume continuous speed and a well defined power function, which are assumptions that do not hold in practice. In this paper, we study the problem from a practical point of view, that is, we study the case of discrete speeds and make no restriction on the form of the power functions. Furthermore, we take into account processor idle power and speed change overhead, which were ignored in previous similar studies. We present a fully polynomial time approximation scheme (FPTAS), which has performance guarantees and usually obtains solutions very close to the optimal solution in practice. Our evaluation shows that our algorithm performs very well and generally obtains solutions within 0.1.

[1]  Sharad Malik,et al.  Compile-time dynamic voltage scaling settings: opportunities and limits , 2003, PLDI '03.

[2]  Thomas D. Burd,et al.  Design issues for Dynamic Voltage Scaling , 2000, ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514).

[3]  Alan Jay Smith,et al.  Operating systems techniques for reducing processor energy consumption , 2001 .

[4]  E. J. McShane Jensen's inequality , 1937 .

[5]  Miodrag Potkonjak,et al.  Synthesis techniques for low-power hard real-time systems on variable voltage processors , 1998, Proceedings 19th IEEE Real-Time Systems Symposium (Cat. No.98CB36279).

[6]  F. Frances Yao,et al.  A scheduling model for reduced CPU energy , 1995, Proceedings of IEEE 36th Annual Foundations of Computer Science.

[7]  Alan Jay Smith,et al.  Operating System Modifications for Task-Based Speed and Voltage , 2003, MobiSys '03.

[8]  Ragunathan Rajkumar,et al.  Practical voltage-scaling for fixed-priority RT-systems , 2003, The 9th IEEE Real-Time and Embedded Technology and Applications Symposium, 2003. Proceedings..

[9]  Manish Gupta,et al.  Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors , 2000, IEEE Micro.

[10]  I. Ilišević,et al.  Jensen's inequality , 2005 .

[11]  Neil Weste,et al.  Principles of CMOS VLSI Design , 1985 .

[12]  Flavius Gruian Hard real-time scheduling for low-energy using stochastic data and DVS processors , 2001, ISLPED '01.

[13]  Klara Nahrstedt,et al.  Energy-efficient soft real-time CPU scheduling for mobile multimedia systems , 2003, SOSP '03.

[14]  Rami G. Melhem,et al.  Dynamic and aggressive scheduling techniques for power-aware real-time systems , 2001, Proceedings 22nd IEEE Real-Time Systems Symposium (RTSS 2001) (Cat. No.01PR1420).

[15]  Rami G. Melhem,et al.  Collaborative operating system and compiler power management for real-time applications , 2003, The 9th IEEE Real-Time and Embedded Technology and Applications Symposium, 2003. Proceedings..

[16]  Alan Jay Smith,et al.  Improving dynamic voltage scaling algorithms with PACE , 2001, SIGMETRICS '01.

[17]  Hiroto Yasuura,et al.  Voltage scheduling problem for dynamically variable voltage processors , 1998, Proceedings. 1998 International Symposium on Low Power Electronics and Design (IEEE Cat. No.98TH8379).