High Radix Montgomery Multipliers for Residue Arithmetic Channels on FPGAs

This work targets an efficient Montgomery Modular Multiplier for use in the channels of a Residue Number System (RNS). It is implemented on FPGA and optimized by attempting and evaluating the high radix techniques of the Montgomery Algorithm. The usual correction shift step at the end is proved to be infeasible. The resulting multiplier achieves 15ns for a modular multiplication using high radix without correction shift.

[1]  A. Omondi,et al.  Residue Number Systems: Theory and Implementation , 2007 .

[2]  Vassilis Paliouras,et al.  A Low-Complexity High-Radix RNS Multiplier , 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.

[3]  Colin D. Walter.  Still faster modular multiplication , 1995 .

[4]  Mark Shand,et al.  Fast implementations of RSA cryptography , 1993, Proceedings of IEEE 11th Symposium on Computer Arithmetic.

[5]  Michael A. Soderstrand,et al.  Residue number system arithmetic: modern applications in digital signal processing , 1986 .

[6]  Steven G. Johnson,et al.  The Design and Implementation of FFTW3 , 2005, Proceedings of the IEEE.

[7]  Naofumi Takagi,et al.  A Radix-4 Modular Multiplication Hardware Algorithm for Modular Exponentiation , 1992, IEEE Trans. Computers.

[8]  Laurent Imbert,et al.  a full RNS implementation of RSA , 2004, IEEE Transactions on Computers.

[9]  Adi Shamir,et al.  A method for obtaining digital signatures and public-key cryptosystems , 1978, CACM.

[10]  Adrian Philip Wise,et al.  The design and implementation of the IMS A110 image and signal processor , 1989, 1989 Proceedings of the IEEE Custom Integrated Circuits Conference.

[11]  Holger Orup,et al.  Simplifying quotient determination in high-radix modular multiplication , 1995, Proceedings of the 12th Symposium on Computer Arithmetic.

[12]  Behrooz Parhami,et al.  Computer arithmetic - algorithms and hardware designs , 1999 .

[13]  P. L. Montgomery.  Modular multiplication without trial division , 1985 .