A linearity improvement technique for a class-AB CMOS Power Amplifier with a direct feedback path

A new linearity improvement technique is introduced for a class-AB CMOS Power Amplifier (PA). The proposed PA has two stages and each stage has a cascode configuration. A direct feedback path from the input of the power stage to the input of the driver stage via an Accumulation-mode MOS (AMOS) varactor is adopted to improve the linearity. This additional path provides a negative feedback loop for the second-order harmonic, and the AMOS varactor controls the loop gain and the amount of the phase shift of the feedback signals. The proposed PA has been implemented in a standard 0.18-μm CMOS technology. The measured results show a gain of 21.4 dB, a maximum output power of 23.5 dBm with 43.1 % of peak Power-Added-Efficiency (PAE), and a linear output power of 21.4 dBm with 40 % PAE using a 1.85 GHz single tone. The two-tone test demonstrates 10 dBc improvement in the third-order Intermodulation Distortion (IMD3) compared to a conventional PA.Q

[1]  A. Hajimiri,et al.  A 24-GHz, +14.5-dBm fully integrated power amplifier in 0.18-/spl mu/m CMOS , 2005, IEEE Journal of Solid-State Circuits.

[2]  A. Samelis,et al.  Efficiency improvement techniques at low power levels for linear CDMA and WCDMA power amplifiers , 2002, 2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280).

[3]  A. Hajimiri,et al.  A 24GHz, +14.5dBm fully-integrated power amplifier in 0.18 /spl mu/m CMOS , 2004, Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571).

[4]  Arya Behzad,et al.  A single-chip 2.4GHz double cascode power amplifier with switched programmable feedback biasing under multiple supply voltages in 65nm CMOS for WLAN application , 2010, 2010 IEEE Radio Frequency Integrated Circuits Symposium.

[5]  L.E. Larson,et al.  A capacitance-compensation technique for improved linearity in CMOS class-AB power amplifiers , 2004, IEEE Journal of Solid-State Circuits.

[6]  Huey-Ru Chuang,et al.  A 0.25-μm 20-dBm 2.4-GHz CMOS power amplifier with an integrated diode linearizer , 2003 .