Compressed Swapping for NAND Flash Memory Based Embedded Systems

A swapping algorithm for NAND flash memory based embedded systems is developed by combining data compression and an improved page update method. The developed method allows efficient execution of a memory demanding or multiple applications without requiring a large size of main memory. It also helps enhancing the stability of a NAND flash file system by reducing the number of writes. The update algorithm is based on the CFLRU (Clean First LRU) method and employs some additional features such as selective compression and delayed swapping. The WKdm compression algorithm is used for software based compression while the LZO is used for hardware based implementation. The proposed method is implemented on an ARM9 CPU based Linux system and the performances in the execution of MPEG2 decoder, encoder, and gcc programs are measured and interpreted.

[1]  Dae San Kim,et al.  Home network message specification for white goods and its applications , 2002, IEEE Trans. Consumer Electron..

[2]  Yannis Smaragdakis,et al.  The Case for Compressed Caching in Virtual Memory Systems , 1999, USENIX Annual Technical Conference, General Track.

[3]  Rik van Riel.  Page Replacement in Linux 2.4 Memory Management , 2001, USENIX Annual Technical Conference, FREENIX Track.

[4]  Milos Prvulovic,et al.  Improving system performance with compressed memory , 2001, Proceedings 15th International Parallel and Distributed Processing Symposium. IPDPS 2001.

[5]  Daniel Pierre Bovet,et al.  Understanding the Linux Kernel , 2000 .

[6]  Gaetano Borriello,et al.  Practical dictionary management for hardware data compression , 1992, CACM.

[7]  Alair Pereira do Lago,et al.  Adaptive compressed caching: design and implementation , 2003, Proceedings. 15th Symposium on Computer Architecture and High Performance Computing.

[8]  Chanik Park,et al.  Energy-aware demand paging on NAND flash-based embedded storages , 2004, Proceedings of the 2004 International Symposium on Low Power Electronics and Design (IEEE Cat. No.04TH8758).

[9]  Toni Cortes,et al.  Improving Application Performance Through Swap Compression , 1999, USENIX Annual Technical Conference, FREENIX Track.

[10]  Sang Lyul Min,et al.  A space-efficient flash translation layer for CompactFlash systems , 2002, IEEE Trans. Consumer Electron..

[11]  Chanik Park,et al.  A low-cost memory architecture with NAND XIP for mobile embedded systems , 2003, First IEEE/ACM/IFIP International Conference on Hardware/ Software Codesign and Systems Synthesis (IEEE Cat. No.03TH8721).

[12]  Claudia Feregrino Uribe,et al.  X-MatchPRO: A ProASIC-Based 200 Mbytes/s Full-Duplex Lossless Data Compressor , 2001, FPL.

[13]  S Jones,et al.  Performance evaluation of computer architectures with main memory data compression , 1999, J. Syst. Archit..

[14]  Xiaowei Shen,et al.  Hardware Compressed Main Memory: Operating System Support and Performance Evaluation , 2001, IEEE Trans. Computers.

[15]  P. Krishnan,et al.  Flash memory file caching for mobile computers , 1994, 1994 Proceedings of the Twenty-Seventh Hawaii International Conference on System Sciences.

[16]  S. Jones,et al.  100 Mbit/s adaptive data compressor design using selectively shiftable content-addressable memory , 1992 .

[17]  S. Jones,et al.  Design and performance of a main memory hardware data compressor , 1996, Proceedings of EUROMICRO 96. 22nd Euromicro Conference. Beyond 2000: Hardware and Software Design Strategies.

[18]  Jang-Soo Lee,et al.  Design and evaluation of a selective compressed memory system , 1999, Proceedings 1999 IEEE International Conference on Computer Design: VLSI in Computers and Processors (Cat. No.99CB37040).