Power complexity of multiplexer-based optoelectronic crossbar switches
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[1] Zhiwei Mao,et al. A 4Gb/s CMOS fully-differential analog dual delay-locked loop clock/data recovery circuit , 2003, 10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003.
[2] Ted H. Szymanski. Optical link optimization using embedded forward error correcting codes , 2003 .
[3] Xiao Zhang,et al. Deficit round-robin scheduling for input-queued switches , 2003, IEEE J. Sel. Areas Commun..
[4] Andrea Francini,et al. Scalable electronic packet switches , 2003, IEEE J. Sel. Areas Commun..
[5] José G. Delgado-Frias,et al. A VLSI crossbar switch with wrapped wave front arbitration , 2003 .
[6] Kent D. Choquette,et al. Fabrication and performance of two-dimensional matrix addressable arrays of integrated vertical-cavity lasers and resonant cavity photodetectors , 2002 .
[7] Mary Jane Irwin,et al. An analytical power estimation model for crossbar interconnects , 2002, 15th Annual IEEE International ASIC/SOC Conference.
[8] Anand Raghunathan,et al. FLEXBAR: A crossbar switching fabric with improved performance and utilization , 2002, Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285).
[9] Chi-Ying Tsui,et al. A 2 Gb/s 256*256 CMOS crossbar switch fabric core design using pipelined MUX , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).
[10] Luca Benini,et al. Analysis of power consumption on switch fabrics in network routers , 2002, DAC '02.
[11] Yervant Zorian,et al. 2001 Technology Roadmap for Semiconductors , 2002, Computer.
[12] A. Boni,et al. LVDS I/O interface for Gb/s-per-pin operation in 0.35-μ/m CMOS , 2001, IEEE J. Solid State Circuits.
[13] Trevor N. Mudge,et al. Power: A First-Class Architectural Design Constraint , 2001, Computer.
[14] Kenneth Y. Yun. A Terabit Multiservice Switch , 2001, IEEE Micro.
[15] U. Ruckert,et al. High level estimation of the area and power consumption of on-chip interconnects , 2000, Proceedings of 13th Annual IEEE International ASIC/SOC Conference (Cat. No.00TH8541).
[16] David V. Plant,et al. 256-channel bidirectional optical interconnect using VCSELs and photodiodes on CMOS , 2000, International Topical Meeting on Optics in Computing.
[17] T H Szymanski. Bandwidth optimization of optical data links by use of error-control codes. , 2000, Applied optics.
[18] T H Szymanski,et al. Field-programmable logic devices with optical input-output. , 2000, Applied optics.
[19] M. Horowitz,et al. A 2.4 Gb/s/pin simultaneous bidirectional parallel link with per-pin skew compensation , 2000, IEEE Journal of Solid-State Circuits.
[20] Lockheed Martin. A Modulator-based Multistage Free-space Optical Interconnection System , 2000 .
[21] Dennis W. Prather,et al. 1 Gb/s VCSEL/CMOS flip-chip 2-D-array interconnects and associated diffractive optics , 1999, Proceedings. 6th International Conference on Parallel Interconnects (PI'99) (Formerly Known as MPPOI).
[22] Rajeev J Ram,et al. RCE photodetectors based on VCSEL structures , 1999, IEEE Photonics Technology Letters.
[23] M. Horowitz,et al. A 50 Gb/s 32/spl times/32 CMOS crossbar chip using asymmetric serial links , 1999, 1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326).
[24] Nick McKeown,et al. The iSLIP scheduling algorithm for input-queued switches , 1999, TNET.
[25] Fouad Kiamilev,et al. A high-speed 32-channel CMOS VCSEL driver with built-in self-test and clock generation circuitry , 1999 .
[26] Joseph E. Ford,et al. The AMOEBA switch: an optoelectronic switch for multiprocessor networking using dense-WDM , 1999 .
[27] T. K. Woodward,et al. 1-Gb/s integrated optical detectors and receivers in commercial CMOS technologies , 1999 .
[28] Ted H. Szymanski,et al. Error and flow control in terabit intelligent optical backplanes , 1999 .
[29] Fouad Kiamilev. A 500 Mb/s 10/32 channel, 0.5 /spl mu/m CMOS VCSEL driver with built-in self-test and clock generation circuitry , 1998, Conference Proceedings. LEOS'98. 11th Annual Meeting. IEEE Lasers and Electro-Optics Society 1998 Annual Meeting (Cat. No.98CH36243).
[30] Sadik C. Esener,et al. High-speed CMOS switch designs for free-space optoelectronic MIN's , 1998, IEEE Trans. Very Large Scale Integr. Syst..
[31] T. K. Woodward,et al. 1 Gb/s single beam smart-pixel receiver/transmitter realized in hybrid MQW-CMOS OE-VLSI technology , 1998, 1998 IEEE/LEOS Summer Topical Meeting. Digest. Broadband Optical Networks and Technologies: An Emerging Reality. Optical MEMS. Smart Pixels. Organic Optics and Optoelectronics (Cat. No.98TH8369).
[32] Ashok V. Krishnamoorthy,et al. 1 Gbit/s CMOS photoreceiver with integrated detector operating at 850 nm , 1998 .
[33] Ted H. Szymanski,et al. Design Principles for Practical Self-Routing Nonblocking Switching Networks with O(N log N) Bit-Complexity , 1997, IEEE Trans. Computers.
[34] H. Temkin,et al. Modulation properties of high-speed vertical cavity surface emitting lasers , 1997, 1997 55th Annual Device Research Conference Digest.
[35] Michael John Sebastian Smith,et al. Application-specific integrated circuits , 1997 .
[36] Ashok V. Krishnamoorthy,et al. Scaling optoelectronic-VLSI circuits into the 21st century: a technology roadmap , 1996 .
[37] David A. Patterson,et al. Computer Architecture - A Quantitative Approach, 5th Edition , 1996 .
[38] C. Boisrobert,et al. Fiber Optic Communication Systems , 1979 .
[39] David A. Patterson,et al. Computer Architecture: A Quantitative Approach , 1969 .