The advent of inexpensive computing power, i.e., microprocessors, has spurred a great deal of interest in coupling these devices in some coordinated fashion to create solutions to sophisticated problems. In this paper, a class of computer architectures is investigated having the property that the interconnection network of dedicated function processors, which make up a computer, is generated from a high level definition of desired system operation called a control grammar. The multiple processor architecture generated is not unique but rather allows the selection of a candidate machine architecture from a class of architectures satisfying the constraints of the control grammar by applying performance criteria. The control grammar concept is an application of push-down automata theory to the problem of defining control interaction within a network of concurrently operating processors. This concept allows the operation of a processor, upon receipt of a command, to be a function of an internal state as well as the received command. The transition graph of the control grammar maps directly into the set of possible multiple processor network architectures. Properties of the architectures developed in this manner, such as deadlock resolution and performance, are briefly discussed.
[1]
E. Douglas Jensen,et al.
Computer Interconnection Structures: Taxonomy, Characteristics, and Examples
,
1975,
CSUR.
[2]
Gordon Bell,et al.
C.mmp: a multi-mini-processor
,
1972,
AFIPS '72 (Fall, part II).
[3]
Earl C. Joseph.
Innovations in heterogeneous and homogeneous distributed-function architectures
,
1974,
Computer.
[4]
Samuel H. Fuller,et al.
Computer Modules: An architecture for large digital modules
,
1973,
ISCA 1973.
[5]
Richard Edwin Stearns,et al.
Syntax-Directed Transduction
,
1966,
JACM.
[6]
Arie Shoshani,et al.
System Deadlocks
,
1971,
CSUR.
[7]
William A. Woods,et al.
Computational Linguistics Transition Network Grammars for Natural Language Analysis
,
2022
.