MUSE: a wafer-scale systolic DSP

MUSE (Matrix Update Systolic Experiment) is a special-purpose digital signal processor being implemented using restructurable VLSI. It will consist of 5 million working transistors on a single wafer-scale integrated circuit. MUSE is a wafer-scale systolic array designed to operate at the continuous rate of 285 million rotations per second. It will enable space-based radar systems to perform real-time adaptive nulling on up to 63 jammers with nulls of 50 dB. The rotator cell has been fabricated in 2 mu m CMOS; a small testbed for 4 PEs has been built and operates at specification. Design for the wafer-scale interconnect is in progress. MUSE is a 1.7 Billion Real Operations per Second system which fits on a single 4" by 4" silicon substrate.<<ETX>>

[1]  James Mann,et al.  The Lincoln programmable image-processing wafer , 1990, 1990 Proceedings. International Conference on Wafer Scale Integration.

[2]  A. H. Anderson,et al.  RVLSI applications and physical design , 1989, [1989] Proceedings International Conference on Wafer Scale Integration.

[3]  Jack E. Volder,et al.  The CORDIC computing technique , 1899, IRE-AIEE-ACM '59 (Western).

[4]  Charles M. Rader,et al.  Hyperbolic householder transformations , 1986, IEEE Trans. Acoust. Speech Signal Process..

[5]  R. Frankel,et al.  SLASH-An RVLSI CAD system , 1989, [1989] Proceedings International Conference on Wafer Scale Integration.

[6]  P. W. Wyatt,et al.  Restructurable VLSI-a demonstrated wafer-scale technology , 1989, [1989] Proceedings International Conference on Wafer Scale Integration.

[7]  G. Chapman,et al.  The technology of laser formed interactions for wafer scale integration , 1989, [1989] Proceedings International Conference on Wafer Scale Integration.

[8]  Glenn H. Chapman,et al.  Laser Restructurable Technology and Design , 1989 .

[9]  Jack E. Volder The CORDIC Trigonometric Computing Technique , 1959, IRE Trans. Electron. Comput..