ViTAL: A Verification Tool for EAST-ADL Models Using UPPAAL PORT
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Paul Pettersson | Eduard Paul Enoiu | Raluca Marinescu | Cristina Cerschi Seceleanu | P. Pettersson | C. Seceleanu | R. Marinescu
[1] Manfred Broy,et al. Challenges in automotive software engineering , 2006, ICSE.
[2] Pierre Wolper,et al. Using partial orders for the efficient verification of deadlock freedom and safety properties , 1991, Formal Methods Syst. Des..
[3] Mamoun Filali,et al. Formal Verification of AADL models with Fiacre and Tina , 2010 .
[4] Robert de Simone,et al. Modeling of immediate vs. delayed data communications: from AADL to UML Marte , 2007, FDL.
[5] Sébastien Gérard,et al. Managing Complexity of Automotive Electronics Using the EAST-ADL , 2007, 12th IEEE International Conference on Engineering Complex Computer Systems (ICECCS 2007).
[6] John Håkansson,et al. Component-Based Design and Analysis of Embedded Systems with UPPAAL PORT , 2008, ATVA.
[7] Paul Pettersson,et al. ABV - A Verifier for the Architecture Analysis and Design Language (AADL) , 2011, 2011 16th IEEE International Conference on Engineering of Complex Computer Systems.
[8] Lei Feng,et al. Verifying system behaviors in EAST-ADL2 with the SPIN model checker , 2010, 2010 IEEE International Conference on Mechatronics and Automation.
[9] Rajeev Alur,et al. A Theory of Timed Automata , 1994, Theor. Comput. Sci..
[10] Rolf Johansson,et al. Model-Based Safety Engineering of Interdependent Functions in Automotive Vehicles Using EAST-ADL2 , 2010, SAFECOMP.
[11] Philippe Dhaussy,et al. AADL Execution Semantics Transformation for Formal Verification , 2008, 13th IEEE International Conference on Engineering of Complex Computer Systems (iceccs 2008).
[12] Hans Hansson,et al. The SaveCCM Language Reference Manual , 2007 .
[13] Charles André,et al. Marte CCSL to Execute East-ADL Timing Requirements , 2009, 2009 IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing.
[14] Wang Yi,et al. Partial Order Reductions for Timed Systems , 1998, CONCUR.
[15] Martin Törngren,et al. From EAST-ADL to AUTOSAR Software Architecture: A Mapping Scheme , 2011, ECSA.
[16] Pierre-Yves Schobbens,et al. Verifying Functional Behaviors of Automotive Products in EAST-ADL2 Using UPPAAL-PORT , 2011, SAFECOMP.
[17] Rolf Johansson,et al. The EAST-ADL Architecture Description Language for Automotive Embedded Software , 2007, Model-Based Engineering of Embedded Real-Time Systems.
[18] Laurent Pautet,et al. From the prototype to the final embedded system using the Ocarina AADL tool suite , 2008, TECS.
[19] Pierre Wolper,et al. Using partial orders for the efficient verification of deadlock freedom and safety properties , 1991, Formal Methods Syst. Des..
[20] John Håkansson,et al. Partial Order Reduction for Verification of Real-Time Components , 2007, FORMATS.
[21] Jianlin Shi,et al. Mapping Simulink to UML in the design of embedded systems:Investigating scenarios and transformations , 2008 .