Cost-Efficient Parallel RSA Decryption with Integrated GPGPU and OpenCL

Secure communications become more, more important with the exponential growth of Internet data services. However, to massively deploy such services in current networks, we need to deal with different architectures, time-consuming encryption/decryption algorithms. Recently, numerous research efforts have been focused on parallel computing using high-end discrete GPGPU to achieve peak throughput, while the study on more cost-efficient integrated GPGPU is still open, which is included in almost all of the Intel CPUs currently, e.g. Celeron, Pentium, Core, even Xeon-E3 families. In this paper, we propose a generic heterogeneous computing approach for the decryption of RSA algorithm. Based on OpenCL, we are able to implement our idea on the off-the-shelf mini PC with low-cost integrated GPGPU. According to the experimental results, we show that the proposed scheme can fully utilize the capacity of integrated GPGPU,, a 2 times throughput improvement over the CPUonly solution can be expected.

[1]  Randy H. Katz,et al.  Contemporary Logic Design , 2004 .

[2]  Sangjin Han,et al.  PacketShader: a GPU-accelerated software router , 2010, SIGCOMM '10.

[3]  P. L. Montgomery Modular multiplication without trial division , 1985 .

[4]  Ç. Koç Analysis of sliding window techniques for exponentiation , 1995 .

[5]  Lihua Yu,et al.  An Executing Method for Time and Energy Optimization in Heterogeneous Computing , 2011, 2011 IEEE/ACM International Conference on Green Computing and Communications.

[6]  Veljko Milutinovic,et al.  A survey of heterogeneous computing: concepts and systems , 1996, Proc. IEEE.

[7]  Randy H. Katz,et al.  Contemporary logic design (2. ed.) , 2005 .

[8]  Guido Appenzeller,et al.  Maturing of OpenFlow and Software-defined Networking through deployments , 2014, Comput. Networks.

[9]  Taoka Hidekazu,et al.  Scenarios for 5G mobile and wireless communications: the vision of the METIS project , 2014, IEEE Communications Magazine.

[10]  Thierry Turletti,et al.  A Survey of Software-Defined Networking: Past, Present, and Future of Programmable Networks , 2014, IEEE Communications Surveys & Tutorials.

[11]  Salim Hariri,et al.  Performance-Effective and Low-Complexity Task Scheduling for Heterogeneous Computing , 2002, IEEE Trans. Parallel Distributed Syst..

[12]  Seungyeop Han,et al.  SSLShader: Cheap SSL Acceleration with Commodity Processors , 2011, NSDI.

[13]  Raouf Boutaba,et al.  A survey of network virtualization , 2010, Comput. Networks.

[14]  David R. Kaeli,et al.  The convergence of HPC and embedded systems in our heterogeneous computing future , 2011, 2011 IEEE 29th International Conference on Computer Design (ICCD).

[15]  Fernando M. V. Ramos,et al.  Software-Defined Networking: A Comprehensive Survey , 2014, Proceedings of the IEEE.

[16]  Adi Shamir,et al.  A method for obtaining digital signatures and public-key cryptosystems , 1978, CACM.

[17]  Abdallah Shami,et al.  NFV: state of the art, challenges, and implementation in next generation mobile networks (vEPC) , 2014, IEEE Network.

[18]  Niccolo Cascarano,et al.  iNFAnt: NFA pattern matching on GPGPU devices , 2010, CCRV.

[19]  J. Quisquater,et al.  Fast decipherment algorithm for RSA public-key cryptosystem , 1982 .

[20]  Yajun Ha,et al.  A heterogeneous platform with GPU and FPGA for power efficient high performance computing , 2014, 2014 International Symposium on Integrated Circuits (ISIC).