Une méthodologie de conceptionde circuits intégrés quasi-insensibles aux délais :application à l'étude et à la réalisation d'un processeur RISC 16-bit asynchrone

Les circuits asynchrones se caracterisent par l'absence d'horloge. Ils offrent des proprietes interessantes pour l'integration de systemes dans les technologies submicroniques telles que robustesse, faible bruit, faible consommation, bonne modularite. Cependant, le manque de methodes et outils de conception est un frein a leur developpement. Les travaux presentes dans cette these portent sur la definition d'une methodologie de conception de circuits integres asynchrones quasi-insensibles aux delais. Celle-ci permet d'une part la modelisation dans un langage de haut-niveau et la simulation dans un environnement standard et d'autre part la generation de circuits uniquement constitues de cellules standard. Cette methodologie a ete appliquee a l'etude et a la realisation d'un processeur RISC 16-bit. Son architecture originale permet d'effectuer l'envoi des instructions dans l'ordre et de les terminer dans le desordre. Ce prototype fabrique dans la technologie 0.25um de STMicroelectronics est l'un des processeurs asynchrones le plus rapide realise a ce jour

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