VLSI implementation of real-time image rotation

A VLSI implementation of real-time image rotation is presented. The implementation satisfies real-time constraints and also introduces very few distortions in the rotated image. The VLSI design is based on a skewed raster scan of the original image. It uses only integer additions instead of floating point multiplications and incorporates a programmable logic array which contains trigonometric function values with precision of upto 1/spl deg/ in the rotation angle. This results in improved real-time performance compared to existing hardware designs. The design is shown to accommodate large images without sacrificing real-time performance with existing VLSI technology.

[1]  Haviland,et al.  A Cordic Arithmetic Processor Chip , 1980, IEEE Transactions on Computers.

[2]  R. W. Brodersen,et al.  Architectures and design techniques for real-time image-processing IC's , 1987 .

[3]  Eugene Ackerman,et al.  High Speed Image Rotation in Embedded Systems , 1995, Comput. Vis. Image Underst..

[4]  Indradeep Ghosh,et al.  VLSI Implementation of An Efficient ASIC Architecture for Real-Time Rotation of Digital Images , 1995, Int. J. Pattern Recognit. Artif. Intell..

[5]  C.-Y. Lee,et al.  An efficient ASIC architecture for real-time edge detection , 1989 .

[6]  Jack E. Volder.  The CORDIC Trigonometric Computing Technique , 1959, IRE Trans. Electron. Comput..

[7]  Yoji Yamada,et al.  Hardware for image rotation by twice skew transformations , 1987, IEEE Trans. Acoust. Speech Signal Process..

[8]  Indradeep Ghosh,et al.  Design of an application specific VLSI chip for image rotation , 1994, Proceedings of 7th International Conference on VLSI Design.