Real-time FPGA-based architecture for stereo vision

In this paper, an FPGA based architecture for stereo vision is discussed. The architecture provides a high-density disparity map in real time. The architecture is based on area comparison between the image pair using the sum of absolute differences. The architecture scans the input images in partial columns which are then processed in parallel. The system performs monolithically on a pair images in real time. The purpose of the system is to be integrated ins smart camera for real-time image analysis based on FPGA processing.