Design Of Ion-implanted MOSFET's with Very Small Physical Dimensions

This paper considers the design, fabrication, and characterization of very small Mosfet switching devices suitable for digital integrated circuits, using dimensions of the order of 1 /spl mu/. Scaling relationships are presented which show how a conventional MOSFET can be reduced in size. An improved small device structure is presented that uses ion implantation, to provide shallow source and drain regions and a nonuniform substrate doping profile. One-dimensional models are used to predict the substrate doping profile and the corresponding threshold voltage versus source voltage characteristic. A two-dimensional current transport model is used to predict the relative degree of short-channel effects for different device parameter combinations. Polysilicon-gate MOSFET's with channel lengths as short as 0.5 /spl mu/ were fabricated, and the device characteristics measured and compared with predicted values. The performance improvement expected from using these very small devices in highly miniaturized integrated circuits is projected.

[1]  F. Fang,et al.  Transport Properties of Electrons in Inverted Silicon Surfaces , 1968 .

[2]  K. Komatsubara,et al.  Transport Properties of Electrons in Inverted InSb Surface , 1969 .

[3]  S. Middelhoek.  Projection masking, thin photoresist layers and interference effects , 1970 .

[4]  R. Dennard,et al.  An experimental high-density memory array fabricated with electron beam , 1972 .

[5]  Henry I. Smith,et al.  X-ray Lithography: A New High Resolution Replication Process. , 1972 .

[6]  R. M. Swanson,et al.  Ion-implanted complementary MOS transistors in low-voltage circuits , 1972 .

[7]  D. P. Kennedy,et al.  Steady state mathematical theory for the insulated gate field effect transistor , 1973 .

[8]  M. Mock.  A two-dimensional mathematical model of the insulated-gate field-effect transistor , 1973 .

[9]  J. Pankratz,et al.  A high-gain, low-noise transistor fabricated with electron beam lithography , 1973 .

[10]  M. Hatzakis,et al.  Electron-Beam Fabrication of Ion Implanted High-Performance FET Circuits , 1973 .

[11]  H. S. Lee.  An analysis of the threshold voltage for short-channel IGFET's , 1973 .

[12]  R. Troutman.  Subthreshold design considerations for insulated gate field-effect transistors , 1973 .

[13]  R.C. Henderson,et al.  A high-speed P-channel random access 1024-bit memory made with electron lithography , 1975, IEEE Journal of Solid-State Circuits.

[14]  V. L. Rideout,et al.  Device design considerations for ion implanted n-channel MOSFETs , 1975 .