Reflections on the Future of Concurrency Theory in General and Process Calculi in Particular

In this article we review the current state of concurrency theory with respect to its industrial impact. This review is both retrospective and prospective, and naturally encompasses process calculi, which are a major vector for spreading concurrency theory concepts. Considering the achievements, but also the failures, we try to identify the causes that, so far, prevented a larger dissemination of process calculi. This suggests a new generation of formal specification languages that would combine the concurrent features of process calculi with the standard concepts present in algorithmic languages. Finally, we underline two major evolutions in the software and hardware industries that open new application domains for the concurrency theory community.

[1]  Raheel Ahmad,et al.  The π-Calculus: A theory of mobile processes , 2008, Scalable Comput. Pract. Exp..

[2]  Frédéric Lang,et al.  SVL: A Scripting Language for Compositional Verification , 2001, FORTE.

[3]  Hubert Garavel,et al.  State Space Reduction for Process Algebra Specifications , 2004, AMAST.

[4]  Cédric Fournet,et al.  The reflexive CHAM and the join-calculus , 1996, POPL '96.

[5]  Radu Mateescu,et al.  CADP 2006: A Toolbox for the Construction and Analysis of Distributed Processes , 2007, CAV.

[6]  Robin Milner,et al.  A Calculus of Mobile Processes, II , 1992, Inf. Comput..

[7]  Alain J. Martin Compiling communicating processes into delay-insensitive VLSI circuits , 2005, Distributed Computing.

[8]  Takashi Nanya,et al.  Verification of asynchronous logic circuit design using process algebra , 1997, Systems and Computers in Japan.

[9]  Cherrice Traver,et al.  Analyzing and verifying locally clocked circuits with the concurrency workbench , 1995, Proceedings. Fifth Great Lakes Symposium on VLSI.

[10]  Robin Milner,et al.  Communication and concurrency , 1989, PHI Series in computer science.

[11]  Rance Cleaveland,et al.  The Concurrency Factory: A Development Environment for Concurrent Systems , 1996, CAV.

[12]  Holger Hermanns,et al.  MODEST: A Compositional Modeling Formalism for Hard and Softly Timed Systems , 2006, IEEE Transactions on Software Engineering.

[13]  Mihaela Sighireanu,et al.  A Graphical Parallel Composition Operator for Process Algebras , 1999, FORTE.

[14]  J. F. Groote,et al.  Specification and implementation of components of a μCRL toolbox , 1995 .

[15]  Iso. Lotos,et al.  A Formal Description Technique Based on the Temporal Ordering of Observational Behaviour , 1985 .

[16]  Jane Hillston,et al.  Process algebras for quantitative analysis , 2005, 20th Annual IEEE Symposium on Logic in Computer Science (LICS' 05).

[17]  Radu Mateescu,et al.  DISTRIBUTOR and BCG_MERGE: Tools for Distributed Explicit State Space Generation , 2006, TACAS.

[18]  Radu Mateescu,et al.  Local Model-Checking of an Alternation-Free Value-Based Modal Mu-Calculus , 1998 .

[19]  Robin Milner,et al.  A Calculus of Communicating Systems , 1980, Lecture Notes in Computer Science.

[20]  Jim Davies,et al.  A Brief History of Timed CSP , 1995, Theor. Comput. Sci..

[21]  Roberto Gorrieri,et al.  Corrigendum to "A tutorial on EMPA: a theory of concurrent processes with nondeterminism, priorities, probabilities and time" - [TCS 202 (1998) 1-54] , 2001, Theor. Comput. Sci..

[22]  Roberto Gorrieri,et al.  A Tutorial on EMPA: A Theory of Concurrent Processes with Nondeterminism, Priorities, Probabilities and Time , 1998, Theor. Comput. Sci..

[23]  Robin Milner,et al.  Bigraphs as a Model for Mobile Interaction , 2002, ICGT.

[24]  Holger Hermanns,et al.  MoDeST: A compositional modeling formalism for real-time and stochastic systems , 2004 .

[25]  Alan Bundy,et al.  Constructing Induction Rules for Deductive Synthesis Proofs , 2006, CLASE.

[26]  Iso Iec Enhancements to LOTOS (E-LOTOS) , 2001 .

[27]  C. A. R. Hoare,et al.  Communicating sequential processes , 1978, CACM.

[28]  Marta Z. Kwiatkowska,et al.  Opportunities and Challenges in Process-algebraic Verification of Asynchronous Circuit Designs , 2006, Electron. Notes Theor. Comput. Sci..

[29]  Günter Karjoth,et al.  LOEWE: A LOTOS Engineering Workbench , 1993, Comput. Networks ISDN Syst..

[30]  Gordon B. Davis,et al.  IFIP , 1997, DATB.

[31]  Hubert Garavel,et al.  Compilation et vérification de programmes LOTOS , 1989 .

[32]  Steve Furber,et al.  Principles of Asynchronous Circuit Design: A Systems Perspective , 2010 .

[33]  George J. Milne,et al.  CIRCAL and the representation of communication, concurrency, and time , 1985, TOPL.

[34]  Andrew Hinton,et al.  PRISM: A Tool for Automatic Verification of Probabilistic Systems , 2006, TACAS.

[35]  Hubert Garavel,et al.  OPEN/CÆSAR: An OPen Software Architecture for Verification, Simulation, and Testing , 1998, TACAS.

[36]  Frédéric Lang,et al.  NTIF: A General Symbolic Model for Communicating Sequential Processes with Data , 2002, FORTE.

[37]  Kenneth E. Iverson,et al.  Notation as a tool of thought , 1980, APLQ.

[38]  J. Cheney,et al.  A sequent calculus for nominal logic , 2004, LICS 2004.

[39]  Scott Hauck,et al.  Asynchronous design methodologies: an overview , 1995, Proc. IEEE.

[40]  Arno Wouters Manual for the $ mu CRL $ tool set (version 2.8.2) , 2001 .

[41]  Gwen Salaün,et al.  Translating FSP into LOTOS and networks of automata , 2007, Formal Aspects of Computing.

[42]  C. A. R. Hoare,et al.  A Theory of Communicating Sequential Processes , 1984, JACM.

[43]  Steven M. Nowick,et al.  An introduction to asynchronous circuit design , 1998 .

[44]  Jan Friso Groote,et al.  The Syntax and Semantics of μCRL , 1995 .

[45]  Tommaso Bolognesi,et al.  LOTOSphere: Software Development with LOTOS , 1995, Springer US.

[46]  Holger Hermanns,et al.  Interactive Markov Chains , 2002, Lecture Notes in Computer Science.

[47]  William F. Gilreath,et al.  Concurrency State Models and Java Programs , 2000, Parallel Distributed Comput. Pract..

[48]  Sjouke Mauw,et al.  A process specification formalism , 1990 .

[49]  Gwen Salaün,et al.  Translating Hardware Process Algebras into Standard Process Algebras: Illustration with CHP and LOTOS , 2005, IFM.

[50]  Radu Mateescu,et al.  Vérification des propriétés temporelles des programmes parallèles , 1998 .

[51]  Robin Milner,et al.  A Calculus of Mobile Processes, II , 1992, Inf. Comput..

[52]  Rance Cleaveland,et al.  The Concurrency Workbench , 1990, Automatic Verification Methods for Finite State Systems.

[53]  Davide Sangiorgi,et al.  The Pi-Calculus - a theory of mobile processes , 2001 .

[54]  Holger Hermanns,et al.  On Combining Functional Verification and Performance Evaluation Using CADP , 2002, FME.

[55]  Yvain Thonnart,et al.  Formal Verification of CHP Specifications with CADP Illustration on an Asynchronous Network-on-Chip , 2007, 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'07).