Effects of annealing on pentacene field-effect transistors using polyimide gate dielectric layers

We report systematic studies on the effects of annealing on pentacene field-effect transistors (FETs). The FETs are fabricated on plastic films with polyimide gate dielectric layers, encapsulated with poly-chloro-para-xylylene (parylene) passivation layers, and annealed in a nitrogen environment at different substrate temperatures. The annealed FETs are functional at a measurement temperature of 160°C and exhibit no degradations in the transistor performance after being subjected to a number of heat cycles between room temperature and 160°C. The annealed FETs exhibit a change of less than 5% in the source-drain currents even after the application of dc voltage biases of VDS=VGS=−40V for 41h. When the FETs are annealed at 140°C for 12h in a nitrogen environment, the mobility increases from 0.52to0.56cm2∕Vs and the on/off ratio also improves to 106.

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