Parallel Program Design

A monolithically integrated semiconductor circuit, provided for coupling arrangements having symmetrical cross points, comprising two through switching NPN transistors, and a composite circuit for switching through the switching transistors. The composite circuit includes a double collector PNP transistor, with one collector connected to the base of a first NPN transistor and the other collector connected to the base of a second NPN transistor. The emitter of the double collector transistor is connected to the collector of both NPN transistors and also, via a first resistor to a voltage source. The base of the double collector transistor is connected, via a component causing a constant drop in voltage, to the voltage source, and also via a second resistor, to a trigger stage. The emitters of the NPN transistor are connected, respectively, to the bases of the two through switching transistors.