Virtex-4VQ dynamic and mitigated single event upset characterization summary

[1]  Gary Swift,et al.  Single-Event Upset Mitigation Design Flow for Xilinx FPGA PowerPC Systems , 2008 .

[2]  W. Shedd,et al.  Dose Rate Upset Investigations on the Xilinx Virtex IV Field Programmable Gate Arrays , 2007, 2007 IEEE Radiation Effects Data Workshop.

[3]  G Allen,et al.  Assessing and mitigating radiation effects in Xilinx SRAM FPGAs , 2008, 2008 European Conference on Radiation and Its Effects on Components and Systems.

[4]  David M. Hiemstra,et al.  Single Event Upset Characterization of the Virtex-5 Field Programmable Gate Array Using Proton Irradiation , 2010, 2010 IEEE Radiation Effects Data Workshop.

[5]  A. Lesea,et al.  Effectiveness of Internal Versus External SEU Scrubbing Mitigation Strategies in a Xilinx FPGA: Design, Test, and Analysis , 2008, IEEE Transactions on Nuclear Science.

[6]  A. Lesea,et al.  Effectiveness of internal vs. external SEU scrubbing mitigation strategies in a Xilinx FPGA: Design, test, and analysis , 2007, 2007 9th European Conference on Radiation and Its Effects on Components and Systems.

[7]  C. Carmichael,et al.  Dynamic testing of Xilinx Virtex-II field programmable gate array (FPGA) input/output blocks (IOBs) , 2004, IEEE Transactions on Nuclear Science.

[8]  G.M. Swift,et al.  Upset Characterization and Test Methodology of the PowerPC405 Hard-Core Processor Embedded in Xilinx Field Programmable Gate Arrays , 2007, 2007 IEEE Radiation Effects Data Workshop.

[9]  F. Chayab,et al.  Single Event Upset Characterization of the Virtex-4 Field Programmable Gate Array Using Proton Irradiation , 2006, 2006 IEEE Radiation Effects Data Workshop.

[10]  Chen Wei Tseng,et al.  Correcting Single-Event Upsets in Virtex-II Platform FPGA Configuration Memory , 2007 .

[11]  Wei Tseng.  Correcting Single-Event Upsets with a Self-Hosting Configuration Management Core , 2000 .

[12]  M. Caffrey,et al.  Domain Crossing Errors: Limitations on Single Device Triple-Modular Redundancy Circuits in Xilinx FPGAs , 2007, IEEE Transactions on Nuclear Science.

[13]  P. Adell.  Assessing and Mitigating Radiation Effects in Xilinx FPGAs , 2008 .

[14]  Gary Swift,et al.  VIRTEX-4 VQ static SEU Characterization Summary , 2008 .

[15]  C. Carmichael,et al.  Single Event Upsets in Xilinx Virtex-4 FPGA Devices , 2006, 2006 IEEE Radiation Effects Data Workshop.