A new current-mode squaring circuit with compensation for error resulting from carrier mobility reduction

This paper presents a new current-mode squaring circuit. The design is based on MOSFETs translinear principle in strong inversion. A new compensation techniques to minimize the second order effects caused by carrier mobility reduction in short channel MOSFETs is proposed. Tanner T-spice simulation tool is used to confirm the functionality of the proposed design in 0.18μm CMOS process technology. Simulation results indicate that the maximum linearity error is 1.16 % and the power consumption is 331μW.

[1]  Kobchai Dejhan,et al.  Versatile analog squarer and multiplier free from body effect , 2012 .

[2]  S. Sengupta.  Adaptively biased linear transconductor , 2005, IEEE Transactions on Circuits and Systems I: Regular Papers.

[4]  W. A. Serdijn,et al.  A 3.3 V Current-Controlled √ -Domain Oscillator , 1998 .

[5]  Igor M. Filanovsky,et al.  Simple CMOS analog square-rooting and squaring circuits , 1992 .

[6]  Hakan Kuntman,et al.  Novel high-precision current-mode multiplier/divider , 2009 .

[7]  Kyoung-Rok Cho,et al.  A novel CMOS operational transconductance amplifier based on a mobility compensation technique , 2005, IEEE Trans. Circuits Syst. II Express Briefs.

[8]  A. Lopez,et al.  A novel two quadrant MOS translinear Squarer-divider cell , 2008, 2008 15th IEEE International Conference on Electronics, Circuits and Systems.

[9]  Zheng Tang,et al.  Four-quadrant CMOS current-mode multiplier independent of device parameters , 2000 .

[10]  S.-I..  Analogue squarer and multiplier based on MOS square-law characteristic , 2004 .

[11]  Bin-Da Liu,et al.  Current-mode defuzzifier circuit to realise the centroid strategy , 1997 .

[12]  Hongyi Chen,et al.  Quadratic-translinear CMOS multiplier-divider circuit , 1997 .

[13]  M. Kumngern,et al.  A low-voltage CMOS current squarer circuit , 2005, IEEE International Symposium on Communications and Information Technology, 2005. ISCIT 2005..

[14]  W. Serdijn,et al.  A 3 . 3 V Current-Controlled p-Domain Oscillator , 1998 .

[15]  A. Khoei,et al.  Four-quadrant CMOS analog multiplier based on new current squarer circuit with high-speed , 2009, IEEE EUROCON 2009.

[16]  Alfonso Carlosena,et al.  1.5-V MOS translinear loops with improved dynamic range and their applications to current-mode signal processing , 2003, IEEE Trans. Circuits Syst. II Express Briefs.

[17]  Hiroki Tamura,et al.  Highly-linear CMOS OTA with compensation of mobility reduction , 2008, APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems.