论文信息 - Precise analogue synapse for Kohonen feature maps

Precise analogue synapse for Kohonen feature maps

A plastic medium-term analogue memory or synapse is presented that fulfils the stringent specifications necessary fory the Kohonen algorithm. The principle is based on a switched capacitor-like technique implementing a variable time-constant integrator. The memory leakage standard deviation is 2mV/s at room temperature and the learning gain can be varied over two decades. Its differential structure leads to good PSRR and charge injection cancellation. The total synapse area is 1/16 mm2 using a 3 ¿m self-aligned contact single-metal CMOS technology. Measurement results of a test chip are also presented.

P. Heim | E. A. Vittoz

[1] Yuping He,et al. A charge-based on-chip adaptation Kohonen neural network , 1993, IEEE Trans. Neural Networks.

[2] E. Seevinck. Analysis and synthesis of translinear integrated circuits , 1988 .

[3] B. Hochet,et al. GENERATION OF LEARNING NEIGHBOURHOOD IN KOHONEN FEATURE MAPS BY MEANS OF SIMPLE NONLINEAR NETWORK , 1991 .

[4] Francois Krummenacher,et al. A 4-MHz CMOS Continuous-Time Filter with On-Chip Automatic Tuning , 1987, ESSCIRC '87: 13th European Solid-State Circuits Conference.

[5] Eric A. Vittoz,et al. Charge injection in analog MOS switches , 1987 .

[6] Oliver Landolt. An analog CMOS implementation of a Kohonen network with learning capability , 1995 .

[7] Michel Verleysen,et al. Analog implementation of a Kohonen map with on-chip learning , 1993, IEEE Trans. Neural Networks.

[8] Teuvo Kohonen,et al. Self-Organization and Associative Memory , 1988 .

[9] Eric A. Vittoz,et al. CMOS full-wave operational transconductance rectifier with improved DC transfer characteristic , 1992 .

[10] E. Vittoz,et al. Analog Storage of Adjustable Synaptic Weights , 1991 .